Research And Design Of K-band Highly Integrated Transmitter Front-end

Satellite communication is a wireless communication system that utilizes satellites for forwarding between earth terminals or between earth terminals and satellites.It has been widely used in industrial production and daily life.With the gradual expansion of the application market,satellite communication is developing toward higher frequency band and higher communication quality gradually.Transceiver chip is one of the key units in the communication terminal.The performances of transceiver have great influence on the operation quality and application area of the communication terminal and satellite communications.With increasing of operating frequency,the application of microwave and millimeter-wave wireless system increase significantly.The design requirements and specification of RF-front end are also increasing.The transmitter is mainly applied to convert the baseband signal to a higher frequency band.The main performances of the transmitter include gain,linearity,frequency spurious rejection,area,power consumption,etc.For practical use,the process,power supply voltage and other variations make stricter requirements for the entire system.Traditional millimeter wave front-end is mainly composed of microwave discrete devices,with high cost,high power consumption,large size and it is also difficult to compress.Silicon-based CMOS process enjoys advantages of lower power consumption,lower cost.Also analog,RF and digital circuits can be integrated in single chip in order to achieve miniaturization.But it is also faced with low gain,low output power and other deficiencies.In this paper,a highly integrated on-chip K-band transmitter was studied,designed and implemented in 90nm CMOS process,to accomplish the frequency conversion as well as to solve the spurs,harmonic,gain tuning and other issues.This paper presented the background,current development of domestic and foreign transmitters,key performances,and basic structure of transmitter firstly.Then the system architecture,modules and the basic performances of each module were planned according to the system requirements.Up conversion channel,local oscillator generation modules,power module and digital module were integrated in the entire chip.Among them,the up-conversion channel mainly included gain control module,low-pass filter,two up-conversion mixers,bandpass filter and the power amplifier;two local oscillator were generated by 900MHz PLL and the K-band frequency synthesizer respectively for two up-conversion mixers;LDO provided stable power supply voltage;SPI provided control signal from host computer.This paper focused on the design,simulation,analysis and optimization of the six key modules.Based on the designed module design,the entire chip was taped out and measured.According to the three frequency domain of the system,the six modules were divided into three parts.The first part focused on circuit design of baseband input signal frequency domain,including controllable attenuator and low-pass filter.Spurious and harmonic rejection,gain control,and impedance matching were the key design issue.An improved current mode logic structure was applied for the controllable attenuator to ensure the tuning range and precision of the system,while to ensure the input impedance matching and occupy a smaller chip area.For the spurious and harmonic problems,two cascaded Biquad Gm-C filters were implemented.By allocating performance of each stage,spurs and harmonic generated by the preceding stage could be filtered effectively,and then achieved the desired performance.The second part mainly analyzed the first up-conversion and the intermediate frequency domain,including the first up-conversion mixer and bandpass filter.Based on the overview of mixer,the design and simulation analysis was presented,then made requirements bandpass filter.The tuning of the local oscillation amplitude was realized at the same time.In the up-conversion channel design,image rejection and LO leakage rejection were the major difficulties and critical issues for the bandpass filter design.In this paper,a two-stage band-pass filter and a band-stop filter cascaded as RF active band-pass filter design was proposed and implemented.The center frequency of each filter is staggered to extend bandwidth.Q-enhanced technology was proposed to increase the Q factor.This cascade design ensured a wide bandwidth,tunable gain and tunable quality,and added adjustable image rejection function in the meanwhile,to optimized the image rejection and LO leakage rejection performances.K-band mixer and power amplifier were introduced in the third part.The pre-stage was not I/Q design when the baseband input was not I/Q input.This caused the mixer producing a higher image signal that affected the post-stage power amplifier operation.In this paper,I/Q intermediate frequency input and local oscillator were generated in the channel respectively.The quadrature coupler was integrated on chip.An up-conversion solution for non-I/Q baseband signal system was proposed and implemented by using I/Q mixer with image rejection performance.In this paper,based on the brief description of the power amplifier,the proper amplifier and matching structure were chosen.MOS capacitor compensation was applied to ensure the stability of the power amplifier through the inter-stage matching cascade orthogonal mixer and power amplifier to complete the final requirements.And then I/Q mixer and power amplifier were cascaded by inter-stage matching.The simulation and analysis were conducted for the cascade mixer and power amplifier to achieve requirements.Based on the module design,the schematic and layout of the entire system were designed and completed.The transmitter front-end chip was fabricated in 90nm 1P9M CMOS process,and occupied a chip area of 3.2×2.05mm~2.The die under micro-station test and PCB board-level test was combined for measurement.Measurement results are consistent with the simulation results.The output frequency range of the overall chip was 25GHz-27GHz.Test results showed that the chip achieved the gain tuning range of 28dB and a tuning step of 1dB.The spurious rejection was greater than 40dBc and the input 1dB compression point was-6dB.The highly integrated transmitter chip achieved the desired performances,and could be applicable to non-I/Q baseband input signal system.It could be employed in a wide range of applications.