Ultra-tight GPS/reduced IMU for land vehicle navigation

The navigation system of a vehicle plays an important role in the vehicle's safety and control. Such a system can be realized through the integration of a Global Positioning System (GPS) receiver and an inertial measurement unit (IMU) to provide more accurate navigation information than either system alone. To reduce the cost and volume of such systems, a reduced IMU (RIMU) consisting of only one vertical gyro and two or three accelerometers is used to integrate with a GPS receiver, resulting in three types of GPS/RIMU integration strategies, namely loose, tight and ultra-tight (UT). When the phase lock loops (PLLs) of the GPS receiver in a tight system are aided with the Doppler shift from the integrated system, the tight system is termed as tight integration with loop aiding (TLA).;Test results show that all of the above innovative algorithms are valid, and the three types of GPS/RIMU (i.e. loose, TLA, and UT) work well. Specifically, the LTP method can reduce the three dimensional (3D) root mean square (RMS) velocity error by more than 80% compared to without LTP case; the ALF algorithm can reduce the 3D RMS velocity error by up to 19% compared to constant noise bandwidth loop filters; the VDF and VDCaP systems work well in land vehicle navigation, and the CaPF and RTL algorithms can potentially improve the navigation performance of the UT system.;In this dissertation, the RIMU mechanization, TLA GPS/RIMU, and UT GPS/RIMU are thoroughly researched and evaluated with field vehicle test data. The novel elements of the work include (i) an innovative local terrain predictor (LTP) algorithm for RIMU, (ii) an innovative adaptive loop filter (ALF) for TLA GPS/RIMU, and (iii) two innovative algorithms---namely a cascaded PLL plus a frequency discriminator (CaPF) composite loop and a reconfigurable tracking loop (RTL)---for UT GPS/RIMU. Furthermore, two kinds of UT systems---a vector delay lock loop plus a vector frequency lock loop (VDF) and a vector delay lock loop plus a cascaded PLL (VDCaP)---are implemented.