Strain effects on silicon CMOS transistors: Threshold voltage, gate tunneling current, and 1/f noise characteristics

The study of strain effects on CMOS (complementary-metal-oxide-semiconductor) transistors has been mainly focused on drive current enhancements. In computer central processing unit (CPU) chips, strained CMOS transistors play an important role for high speed computer operations since the CPU speed is directly related to the current drive capabilities of the transistors controlling the CMOS logic circuitry in the chips. In addition to this strain effect on channel carrier mobilities, strain also affects other important physical properties in MOSFETs. This dissertation investigates such strain effects on the MOSFET operation as threshold voltage, gate tunneling current, and low-frequency 1/f noise characteristics. Strain engineering of the MOSFET channel alters the inversion subband energy levels which, in turn, influences these physical properties as well as channel carrier mobilities. More specifically, shear strain reduces symmetry in silicon and lifts the degeneracy of both conduction and valence bands. As a result, the constant energy surfaces are severely warped for the valence band whereas the shapes of the energy surfaces are unchanged to the first order in stress for the conduction band. The strain effects on silicon MOSFETs are then classified as an effect of band splitting and shifts due to the hydrostatic and shear strain components for both conduction and valence bands, and an additional effect of subband (heavy- and light-hole) effective mass change due to the band warping for the valence band.;Based on these key strain effects on MOSFETs, the calculated values for threshold voltage shifts are quite consistent with the measured data for n-channel MOSFETs under uniaxial tensile stress as well as the published experimental data for biaxially tensile-strained n-channel MOSFETs. Gate tunneling currents are also well predicted by this strain model including band splitting, shifts and warping. Furthermore, conduction deformation potential constants are determined through this gate tunneling current measurements on n-channel MOSFETs under mechanical stress. Strain effects on 1/f noise are also studied in conjunction with applications of strained devices to high performance RF or high speed CMOS circuits. Detailed physical mechanisms of the strain effects on 1/f noise power spectral density (PSD) are identified and the contribution of each mechanism to the resultant change in 1/f noise PSD is estimated on the basis of the measured data.