Compound semiconductor power heterojunction bipolar transistor technology

This work explores two aspects of III-V power technology. The first part of this work describes the refinement of a process to fabricate GaN heterojunction bipolar transistors (HBTs), specifically the optimization of the ohmic contact and the plasma etch. The ohmic contact research explored different materials for the creation of contacts to p-type GaN with the goal of reducing the contact resistance. The plasma etch was optimized to reduce the amount of damage to the device. The improvements resulted in a large-area device supporting a collector current, IC, of 10 mA and a current gain of 10. The work is then extended to small-area devices, which show a unity current gain (fT) = 733 MHz, a unity power gain (fMAX) = 133 MHz, and a differential current gain of 49. The current gain was a new record for GaN devices and is competitive with conventional III-V technology.;The second section focuses on the fabrication of power amplifier unit cells and the detailed analysis of device geometry using the InGaP/GaAs material system. The primary yield issues, specifically with creating passives, will be addressed, possible solutions will be proposed, and improvements resulting from the implementation of these solutions will be presented. Devices with 2 x 40 mum2 emitters see fT and fMAX decrease from 58 GHz and 80 GHz to 44 GHz and 66 GHz as the number of emitter fingers are increased from one to four. The fT and fMAX decreases from 48 and 75 GHz for a single four-finger, 2 x 20 mum 2 device to fT = 30 GHz and f MAX = 20.5 GHz for a unit cell consisting of eight devices. Small-signal modeling will be used to explain why the f T and fMAX of degradation as the device and unit cell is scaled.;This work will conclude by discussing the lingering issues with the GaN project and the methods in which to solve these issues. It will also discuss the implications of the power amplifier analysis.