Power-efficient dual-rate gigabit transceiver design

This work describes a dual-rate optical transceiver designed for power-efficient connections within and between modern high-speed digital systems. The transceiver can dynamically adjust its data rate according to the performance requirements, allowing for power-on-demand operation. Dynamic power management enables energy saving and lowers device operating temperatures, improving reliability and lifetime of OE devices such as vertical cavity surface-emitting lasers (VCSELs). To implement dual rate functionality, the transmitter and receiver circuits include separate high-speed and low-power datapath modules. The high-speed module is designed for gigabit operation to achieve high bandwidth. A simpler low-power module is designed for megabit data transmission with low power consumption. The transceiver is fabricated in a 0.5-mum Silicon-on-Sapphire (SOS) CMOS process. The VCSEL and photodetector devices are attached to the transceiver IC using flip-chip bonding. A free-space optical link system is constructed to demonstrate correct dual-rate functionality. Experimental results show reliable link operation using 2-Gb/s and 100-Mb/s data transfer rates with 104mW and 9mW power consumption, respectively. The transceiver's switching time between these two data rates is demonstrated as 10mus which is limited by on-chip register reconfiguration time. Improvement of this switching time can be obtained by using dedicated IO pads for dual-rate control signals. At the circuit level, the incorporation of dual rate functionality into a typical gigabit optical transceiver requires 255 additional MOS transistors.