| At present, analog/RF circuits are tested using ad hoc functional tests on a wide assortment of test equipment. In this dissertation, we develop a test paradigm using machine learning concepts, which meets the accuracy levels of functional testing, yet at significantly reduced cost. The proposed test paradigm relies on a neural system that is trained to test circuits based on a pattern of low-cost measurements, as well as to assess the confidence in the test outcome. Thus, the neural system either infers the results of functional testing from these measurements or defers a decision that involves risk. In the latter case, the ambivalent circuits are retested via functional testing, in order to ensure high test accuracy across the entire circuit population. Overall, with the appropriate extraction of measurement spaces; the number of retested circuits is minimized. Moreover, by varying the confidence levels of the neural system, the method enables the exploration of the trade-off curve between test cost and test accuracy and, therefore, can be used to develop cost-effective test plans.;In cases where analog/RF circuits are deployed in safety-critical applications, they demand extensive on-line parametric screening capabilities, in order to support fail-safe modes and diagnostics at the system level. In this dissertation, we propose to perform on-line testing using checkers that monitor circuit invariants. First, we present a checker for linear time-invariant circuits that monitors a select set of observable states and generates a signal, which, in the absence of errors, converges exponentially fast to the circuit output with controllable time constant. Second, we present a checker for fully differential circuits that exploits the existing space redundancy. Its key feature is that the error threshold adapts dynamically to the magnitude of the monitored differential signals, in order to moderate the occurrence of false alarms. The checker was fabricated on the C5N 0.5mum minimum feature process provided by MOSIS. Finally, we investigate a machine learning solution to the on-line testing problem, which is virtually applicable to any circuit class. In particular, we investigate the on-chip implementation of a neuromorphic test core, which can perform a pseudo-functional test without requiring external test equipment. |
