A comprehensive diagnosis methodology for characterizing logic-behavior of integrated circuit failures

Software-based fault diagnosis has traditionally been used to assist the complex and time-consuming task of physical failure analysis (PFA) by providing target locations (gates, sub-circuits, or nets). However, the effectiveness of this two-stage approach is diminishing rapidly with the continuous circuit miniaturization and increasing complexity of the manufacturing process and packaging technology. Coupled with the increased need for rapid yield learning, this has necessitated new techniques that maximize learning about defect characteristics at the software-based diagnosis level with the goal of reducing eliminating the dependence on PFA. This research is a step towards addressing this growing need.; In this dissertation, we present a comprehensive diagnosis methodology and its implementation in a software tool, DIAGNOSIX, for characterizing the logic-behavior of IC failures. The goal of DIAGNOSIX is to extract one or more fault models for the IC failures, where each fault model accurately captures the locations and behavior of the defects responsible for the observed failures. Accurate characterization of logic-behavior becomes important under three scenarios. First, if there are many failing ICs (during a yield excursion), then a fault diagnosis that provides accurate misbehavior information helps to identify and target the most critical defect mechanisms. Second, the area to be analyzed during PFA is reduced if the diagnosis reports, for example, a bridge between two lines instead of a set of lines because in this case only the area where the lines are actually adjacent has to be inspected. Third, identification of logic misbehavior can lead to development of accurate fault models, which can be used to improve defect coverage during future manufacturing test activities.; DIAGNOSIX is comprehensive because of two main reasons: (1) it is not limited by presumed models of defect behavior in the form of fault models, i.e., rather than checking if an instance of a presumed fault model captures the observed defect behavior, DIAGNOSIX instead analyzes the CUT response to "extract" the fault(s) that model the defect behavior; and (2) it uses all the test patterns (both tester failing and tester passing patterns) and includes generation of additional test patterns to improve diagnosis accuracy, resolution and confidence, three metrics that we have formally defined.; Fault extraction in DIAGNOSIX is enabled by the use of limited layout information and the key assumption that defects are typically localized. Specifically, DIAGNOSIX automatically extracts a fault model for a failing IC by analyzing the behavior of the physical neighborhood surrounding suspect lines. The suspect lines themselves are identified using an initial, fault model-independent localization step.