Ultra-high speed data converter building blocks in Si/SiGe HBT process

High performance multi-stage data converters and sub-sampling frequency down-converters typically require track and hold amplifiers (THA) with high sampling rates and high linearity. Following these broadband circuits, the data converter must also be able to operate at ultra-high frequencies. In this dissertation I present two THA designs and one ultra high-frequency comparator. Each achieved state-of-the-art performance implemented in a 0.5mu m 45GHz BiCMOS Si/SiGe process.; The first track-and-hold amplifier was designed for sub-sampling communications applications based on a diode-bridge switching core with high-speed Schottky diodes. The THA has an input bandwidth in excess of 10GHz, consumes approximately 550mW and can accommodate input voltages up to 600mV. With an input frequency of 8.05GHz and a sampling frequency of 4GHz, the THA has an IIP3 of 26dBm and an SFDR of 30dB. The comparator consumes approximately 80mW with sampling speeds up to 16GHz.; The second was BiCMOS switched-emitter follower based THA designed to consume less current and area than the diode-bridge THA and be available in non-Schottky processes. It has an active area of 0.150mm 2 while consuming 360mW in the THA core. In full sampling mode, the dynamic range was greater than 43.5dB for up to 4GHz clock speed.; For the comparator, an improved design approach to the traditional bipolar master-slave architecture was implemented to reduce the latch time and thus increase the overall clock speed. The result is a design with a clock speed in excess of 16GHz.