AC and noise analysis of deep-submicron MOSFETs

The AC and noise simulation of deep-submicron MOS device has emerged as a very important issue as device size scales down and the operational frequency of CMOS circuit rises. However, the quantum mechanical effects and high energy carriers in deep-submicron devices impede the accurate computer simulations.; As the MOSFET size scales down, the physical oxide thickness gets thinner, and the potential well under gate oxide splits the energy bands into subbands and causes quantum mechanical effects. Also, shorter channel lengths increase the electric field in the channel, invalidating the quasi-equilibrium condition. The carriers in the channel are accelerated to have several times more kinetic energy from the high electric field, the noise behavior of deep-submicron MOSFETs deviates from the long channel MOSFET noise model. This dissertation explores the computer simulation techniques to overcome those modeling obstacles and explains the underlying physics of noise modeling.; The density-gradient model is an efficient approach to simulate the quantum mechanical effects without solving the complex multi-dimensional Schrodinger equations. The density-gradient model enables multi-dimensional AC simulation with quantum mechanical corrections, maintaining good accuracy and reasonable computational speed. From measurement and device simulations, it is shown that the substrate doping profile also has close relation with the quantum mechanical effects.; For noise simulations, the impedance field method with the hydrodynamic model is used to account for high energy carrier effects. A new local noise source model is developed based on the hydrodynamic carrier transport model. From measurement and simulations, the mechanisms of excess noise generation in deep-submicron MOSFETs are identified.; The high energy carriers and modified impedance field are both responsible for the excess noise generation. Contributions from the source side of the channel dominate drain current noise, indicating an accurate local noise source model is most important for drain noise simulation. On the contrary, the gate resistance and high energy electrons near the drain mainly create gate current noise. The gate voltage is also an important factor to gate current noise, controlling the number of high energy carriers contribute gate current noise. In addition, the correlation coefficient between gate and drain current noise in deep submicron MOSFET devices is determined by gate bias and gate resistance. Due to increased gate resistance with MOSFET scaling, consideration of gate resistance in RF front-end design has greater importance.