| This dissertation presents the research being conducted on the development of physical models. First, we study the quantum confinement effects of n-MOSFET's. As MOSFET dimensions shrink into the nanometer regime, and oxide thickness reduces to the angstrom level, significant quantization effects occur in the motion of carriers perpendicular to the interface. Here we incorporate carrier quantization effects in the channel of highly-doped n-MOSFET's by solving the Schrödinger, Poisson, Boltzmann and Current-continuity equations self-consistently. The new method naturally accounts for highly nonequilibrium effects including velocity overshoot, and by populating the subbands according to the self-consistent nonequilibrium distribution function we obtain by solving the Spherical Harmonic Boltzmann Transport Equation (SH-BTE).; Second, based on the numerical SH-BTE, the gate current is simulated. We calculate gate currents of ultrashort MOSFET's with ultrathin gate oxides for different gate and drain biases by directly solving the Schrödinger and the Spherical Harmonic Boltzmann Transport Equation. The carrier distribution function at the SiO2/Si interface is very important because we can clarify the role of hot electrons in gate currents of ultrashort MOSFET's by this electron distribution function. Therefore, we get a very rigorous direct tunneling gate current model which accounts both quantization effect and hot electron effect.; Then we present a new technique to determine the energy distribution function of a degenerate electron gas in a very nonhomogeneous silicon device. This is achieved by incorporating the quantum-mechanical Pauli exclusion principle into the Boltzmann transport equation, and solving it for a deep submicron silicon device. From our simulation results we find that for highly-doped regions the distribution function approaches the Fermi-Dirac form, while in regions of lower doping concentration Boltzmann type distributions are obtained.; Finally, we demonstrate that many detrimental short channel effects can be significantly improved by placing a narrow p+ implant in the source side of an n-channel MOSFET. By applying precise device modeling we have found that an asymmetrical implant near the source end of the channel can improve drain-induced barrier lowering (DIBL), improve noise margins of a CMOS inverter, reduce substrate current and increase the breakdown voltage. |
