Floating gate flash memory devices using high-kappa materials as inter-poly oxide

The downscaling of advanced MOSFET devices requires the use of High-κ dielectric materials to replace the Oxide/Nitride/Oxide (ONO) films that are currently being used between the control and floating gates for nonvolatile memory transistors. Because of charge retention failure and threshold voltage instability an ONO stack thinner than 13.0nm cannot be used for the inter-poly dielectric. The use of High-κ dielectric material will permit the use of thicker inter-poly oxide layers. Thicker interpoly dielectric layers will alleviate the retention failure problem due to leakage current and reduce the programming voltage.; There are many material choices available for replacement of the inter-poly dielectric. Included in the choices of materials are Ta₂O5, TiO ₂ and more recently, ZrO₂ and HfO₂. As a part of this research two of these High-κ dielectric materials, Zr and Hf based dielectrics including aluminum doped oxides were investigated and the best conditions necessary in order to produce high quality High-κ dielectric films were discovered.; The fabrication process utilized a DC reactive sputtering technique in order to fabricate Zr and Hf based dielectric films. The process parameters for providing high quality High-κ dielectrics are presented and discussed. Current-Voltage (I-V) and Capacitance-Voltage (C-V) measurements were utilized to characterize the films. It is shown that aluminum doped HfO₂ is the best candidate for the replacement of the ONO stack dielectric.; The current conduction mechanism was also studied. It is shown that in the high field region, the leakage current is due to the Poole-Frenkl emission.; Floating gate MOSFETs using three different stack dielectric structures consisting of a layer of HfAlO_x (x < 2) with a total EOT (Equivalent Oxide Thickness) raging from 3.5 to 13.0nm were fabricated and studied. Good device characteristics were obtained from the device that employed a single layer of HfAlO_x with an EOT of 5.0nm. A large gate coupling and a 25% reduction in the operating voltage were obtained. This study indicates that downscaling of the inter-poly oxide to EOT 5.0nm is feasible by using the High-κ dielectric films.