Modeling and design of DC power bus interconnects, segmentation, and signal via transitions in multi-layer printed circuit boards using FDTD and a mixed-potential integral equation approach with circuit extraction

The circuit extraction approach based on a mixed-potential integral equation formulation (CEMPIE) is developed and extended to model the DC power buses on two planes. The effects of local decoupling are studied by placing the decoupling capacitor at several locations on test boards with different layer thickness. The inductance associated with the via interconnects between the power/ground planes, and above the power/ground layers are determined from the modeling. The power bus noise reduction is evaluated by estimating the mutual inductance due to the magnetic flux linkage between the power/ground planes. The effects of the dielectric loss and the series resistance of the decoupling capacitors are compared for decreasing the power bus noise at board resonances. The CEMPIE modeling is also applied to model the various power plane segmentation designs. Power islanding with different connections, island locations and shapes, as well as totally gapped power planes with varying gap patterns, are modeled and compared for achieving power bus isolations.; The DC power bus excitation and the resulting electromagnetic interference (EMI) are studied for signal via transitions through the layers in multi-layer printed circuit boards. Measurements and modeling approaches are used to quantify the excited power bus noise, and noise coupled to I/O lines. The effectiveness of placing capacitors in proximity to the via transition is studied. Further, a probabilistic and statistical method is introduced to estimate the power bus noise coupled to I/O lines. In addition, experiments are made to compare the power bus excitations due to the simultaneous switching noise and a signal via transition. The study of power bus noise and EMI as a function of layer thickness indicates a thin power/ground layer spacing is beneficial to minimize the EMI due to signal via transitions.