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Amorphous silicon thin-film transistor active-matrix for reflective cholesteric liquid crystal displays

Posted on:2001-08-15Degree:Ph.DType:Dissertation
University:University of MichiganCandidate:Nahm, Jeong-YeopFull Text:PDF
GTID:1461390014459010Subject:Engineering
Abstract/Summary:
Reflective cholesteric liquid crystal displays (Ch-LCDs) have advantages, such as, high brightness, low power consumption, and wide viewing angle, since they do not need any polarizer, color filter, and backlight. Furthermore, due to their bistability Ch-LCDs can retain their images virtually forever without additional power consumption. But conventional passive-matrix addressing of Ch-LCDs allows only a slow image updating speed. Active-matrix addressing should allow fast image updating or video-rate operation. However, because the threshold voltage of cholesteric, liquid crystal is high (>20V), the switching devices for active-matrix addressing should satisfy required characteristics even under high bias conditions. In order to investigate the applicability of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) for the switching devices of active-matrix (AM) Ch-LCDs, the characteristics of conventional and gate offset high voltage a-Si:H TTFs were examined under high bias conditions. And it was concluded that high OFF-current of conventional a-Si:H TFTs and low ON-current of gate offset high voltage a-Si:H TFTs were main problems for reflective AM Ch-LCD applications. In order to improve the TFT characteristics under high bias conditions, we propose two new a-Si:H TFT structures called gate planarized (GP) and buried field plate (BFP) high voltage a-Si:H TFTs. Firstly, in the GP a-Si:H TFTs, we used a thick spin-coated benzocyclobutene (BCB) layer beneath a thin hydrogenated amorphous silicon nitride (a-SiNx:H) layer for gate insulator. The GP a-Si:H TFT showed normal TFT characteristic up to VGS = VDS = ∼100 V without any device failure. But TFT ON-current of GP a-Si:H TFT was reduced due to the introduction of the thick low dielectric BCB layer. Secondly, in the BFP a-Si:H TFT, an offset region and a buried field plate were introduced between the drain/source and gate electrodes to reduce the electric field in the pinch-off region. For this BFP a-Si:H TFT, a low OFF-current (1.04 pA) and a high ON/OFF-current ratio (5.68 × 106) up to VGS = VDS = ∼30 V were obtained. Based on our a-Si:H TFTs studies, we designed an a-Si:H TFT active-matrix panel and fabricated the AM Ch-LCDs either by optimizing a-Si:H TFT processing or adopting the GP a-Si:H TFT technology. The fabricated a-Si:H TFT active-matrix panels can be operated at the voltage of 50 and 60V, applied to the data and gate lines, respectively. With the a-Si:H TFT active-matrix panels, the AM Ch-LCDs were fabricated and operated with the frame rate of 60 Hz and the maximum contrast ratio of ∼30.
Keywords/Search Tags:Liquid crystal, TFT, Ch-lcds, Amorphous silicon, Active-matrix, GP a-si, Cholesteric, High bias conditions
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