Investigation and mitigation of the adverse effects of PWM adjustable speed drives

With the introduction of high speed semiconductor power devices and the increased application of adjustable speed drives (ASDs) for efficient speed control of ac motors, there has been a growing number of costly motor-drive related process failures. It has been found that the high dv/dt and high switching frequency have caused premature motor insulation failures due to motor terminal over-voltages (exacerbated by longer cable lengths). It is also acknowledged that high dv/dt and high frequency common-mode voltages generated by pulse-width modulated (PWM) inverters contribute significantly to electromagnetic interference (EMI) and may also cause damaging bearing and leakage currents. In response to these problems, a variety of mitigation techniques have been proposed in the past. However, the known solutions usually address these problems one at a time and some of the mitigation techniques are not highly effective.; The major objective of this research is to search for solutions to these ASD application issues with an emphasis on solving all of the problems at the source. Therefore, theoretical analysis of all the above adverse effects are presented and the existing mitigation techniques are evaluated in this dissertation. It is found that common-mode voltage is the major cause of both bearing currents and the conducted EMI, thus the research is focused on new inverter topologies and control strategies in order to eliminate the common-mode voltage. To achieve the goal of common-mode voltage cancellation, a novel dual-bridge inverter (DBI) is proposed and studied. The DBI employs an additional inverter output stage to drive a standard three-phase dual-voltage induction motor and is controlled to generate balanced excitation of the motor resulting in a zero common-mode voltage. It is shown through experimental results that the motor bearing current is eliminated and the conducted EMI is significantly reduced.; In addition to the DBI, multilevel inverter topologies have also been studied. It has been found in this research that with proper selections of the switching states, certain multilevel PWM inverters will not generate common-mode voltages. This new control method is verified in simulation by using both sine-triangle intersection PWM (SPWM) and voltage space-vector modulation (SVM).