DAVE: An automatic layout compiler for mixed analog/digital integrated circuits

Although many application-specific integrated circuits (ASICs) combine analog and digital circuitry, existing automatic layout tools cannot lay out such mixed-signal circuits on a VLSI chip. This dissertation presents and implements a new layout compiler, DAVE, which given a description of a mixed-signal ASIC circuit in the SPICE language, automatically generates a geometrical layout of the circuit suitable for fabrication. DAVE reduces the turnaround time for developing new ASICs and eliminates the need for a highly skilled layout designer.; Mixed-signal ASICs reduce the fabrication cost and increase the stability of circuits; they also present special layout problems. In addition to typical analog layout constraints such as device matching, symmetry, parasitic effects (including parasitic capacitances and parasitic resistances) on routing nets, the layout of a mixed-signal ASIC must also take into account the signal coupling between sensitive nets and noisy nets caused by overlapping capacitances and adjacent capacitances.; DAVE lays out a chip in three phases: placement and floor planning, global routing, and channel routing. To carry out each phase, DAVE uses new algorithms that are sensitive to the special concerns of mixed-signal circuits.; In the first phase, DAVE determines a relative placement of the blocks. This algorithm is based on the sensitivity of the nets and the connectivity and sizes of the blocks. Simulations demonstrate that this algorithm produces shorter wire lengths than those produced using the point-model approach, which considers only the net connectivity of blocks.; In the global routing phase, to avoid net-crossings and to eliminate overlapping capacitances between sensitive nets and noisy nets, DAVE treats the routing patterns created by sensitive nets as traffic signals while routing the noisy nets.; In the channel routing phase, DAVE uses a two-layer gridless channel router to complete the net connection. Experimental results show that, for all of Kuh's benchmark problems, DAVE needs fewer nodes to seek minimal-track solutions than does Wang's router. For a channel with mixed signals, DAVE reduces adjacent capacitance values less than allowed capacitance values. DAVE achieves this behavior by introducing k-length pseudo edges between sensitive nets and noisy nets in the vertical constraint graph of each channel. Working from the global routing, DAVE deletes overlapping capacitances by assigning the directions to all pseudo edges.; To demonstrate DAVE's performance, we laid out two mixed-signal ASIC circuits: a 14-device amplifier with a 2-layer hierarchy, and a 56-device comparator with a 5-layer hierarcy. Running on a SUN-3/160 workstation, DAVE laid out these circuits within 30 seconds and 112 seconds, respectively. In comparison with results obtained by analog layout expert Zhu-Sheng Wang, DAVE achieved corresponding reductions in layout areas of 10 and 5 percent.