Research On Improving Performances Of Organic Transistor Nonvolatile Memory By Developing Composite Ferroelectric Gate Dielectric Layers

Organic memory has very broad application prospects in the fields of automotive electronics,aerospace,wearable devices,flexible handheld devices,etc.In recent years,with the rise of flexible electronic products and wearable intelligent devices,the researchers have attached great importance to organic memory due to its advantages on simple preparation process,low cost,low power consumption,large area preparation and flexibility.Among the organic memories with various structures,ferroelectric organic field-effect transistor non-volatile memory(Fe-OFET-NVM)has the advantages of simple structure,non-destructive readout,easy integration,and high integration density,which has a very broad market development prospect in the next-generation new memory device.So far,most of the Fe-OFET-NVMs that have been reported generally have the problems of high Erasing/Programming operating voltage and low field-effect mobility,which seriously hinder their commercial development.The main reason for the Erasing/Programming operating voltage is that the coercive electric field of the binary ferroelectric polymer poly(vinylidene fluoride-co-trifluoroethylene)[P(VDF-TrFE)]used in the ferroelectric gate insulating layer of these Fe-OFET-NVM is as high as 50 MV/m.The reason for the low mobility is that the rough surface of the ferroelectric polymer P(VDF-TrFE)film and the polarization fluctuation of the surface have a significant adverse effect on the charge transport in the channel.The main research content in this paper was to solve the two common problems of high Erasing/Programming operating voltage and low field-effect mobility in Fe-OFET-NVMs.The following systematic research work has been carried out,and the following results have been obtained:1.The P(VDF-TrFE):Poly(methyl methacrylate)(PMMA)composite ferroelectric gate insulator layer is prepared based on the phase separation technology,which improves the memory performance of the Fe-OFET-NVM devices.During the spin coating of the P(VDF-TrFE):PMMA blended solution,a self-organized vertical phase separation occurs.PMMA gathers between the organic semiconductor and P(VDF-TrFE),which improves the interface state of the ferroelectric gate insulator layer/organic semiconductor and enhances the field-effect mobility of Fe-OFET-NVM.The efffect of the blended ratio of P(VDF-TrFE):PMMA films on the morphology of the composite ferroelectric gate insulator layer,the microstructure,the field-effect mobility,memory window,retention characteristics and memory durability are systematically studied.The results showed that the optimal Fe-OFET-NVM with P(VDF-TrFE):PMMA films at a blended ratio of 90:10 exhibited the average mobility of 1.96 cm~2/Vs,a reliable durability more than 400 cycles and a stable retention characteristic over 6×10~4 s.Based on the analysis of 1/f noise characteristics,the effect of PMMA on the improvement of memory performance is discussed.The experimental data proves that the use of a composite gate insulator layer can allow a strategy of reasonably thinning the thickness of the gate insulator layer to significantly reduce the Erasing/Programming operating voltage of the Fe-OFET-NVM.Using a thinner composite ferroelectric gate insulating layer(290 nm)with the P(VDF-TrFE):PMMA film at a ratio of90:10,the prepared Fe-OFET-NVM has Erasing/Programming operating voltage of±20 V,a reliable endurance of 400 cycles and retention time of 6×10~4 seconds.2.Using a single-layer ferroelectric polymer poly(vinylidene-fluoride-trifluoroet-hylene-chlorotrifluoroethylene)[P(VDF-TrFE-CTFE)]with a thickness of 650 nm as the gate insulator layer,a Fe-OFET-NVM with Erasing/Programming operating voltage of±15V is obtained.It can realize low Erasing/Programming operating voltage,mainly due to P(VDF-TrFE-CTFE)having a significantly lower coercive electric field(Ec?14 MV/m).In order to further improve the field-effect mobility of Fe-OFET-NVM,a P(VDF-TrFE-CTFE):poly(styrene)(PS)composite ferroelectric gate insulator layer is constructed based on the phase separation technique.When the blended solution of P(VDF-TrFE-CTFE):PS is spin-coated,phase separation occurs,which makes PS aggregate on the surface of P(VDF-TrFE-CTFE).The effects of the blended ratio of P(VDF-TrFE-CTFE):PS on the ferroelectric properties,film morphology and memory performance of the Fe-OFET-NVM device were systematically studied.The results show that the optimal blended ratio of P(VDF-TrFE-CTFE):PS is 90:10.under this condition,the low-voltage Fe-OFET-NVM was achieved with the average field-effect mobility of 0.22cm~2/Vs,the Erasing/Programming operating voltage of±10 V,the reliable memory endurance more than 150 cycles,and the stable retention time over 1×10~4 seconds.The fabricated flexible Fe-OFET-NVM has good mechanical flexibility.When the curvature radius was 5.5 mm,the device performance only slightly decreased after 1000 bends.The results provide a simple and effective experimental method for obtaining Fe-OFET-NVM with low Erasing/Programming voltage operation.3.In order to further improve the field-effect mobility of Fe-OFET-NVM under the premise of maintaining low Erasing/Programming voltage,a flexible Fe-OFET-NVM based on P(VDF-TrFE-CTFE)/tetradecane(TTC)composite ferroelectric gate insulator layer was designed and fabricated.The effect of the thickness of TTC on the coverage of P(VDF-TrFE-CTFE)film,the field-effect mobility,the memory window and the memory ON/OFF ratio is systematically studied,and the physical mechanism of improving the memory performance is analyzed.The results show that the use of monolayer TTC film to modify the surface of P(VDF-TrFE-CTFE)significantly improves the field-effect mobility of Fe-OFET-NVM,which has the mobility of up to 0.5 cm~2/Vs,the Erasing/Programming operating voltage of±15 V,reliable memory endurance exceeds 1000 cycles,and stable data retention time over 6000 seconds.The device also exhibits excellent mechanical bending durability,good thermal stability and air stability.The research results provide an effective idea for improving the mobility of Fe-OFET-NVM.4.A composite ferroelectric gate insulator layer based on the P(VDF-TrFE-CTFE)/AlOx/PMMA structure was constructed,and a high-performance Fe-OFET-NVM with multi-bit storage function was obtained on a paper substrate.The composite ferroelectric gate insulating layer structure solves the process compatibility of Fe-OFET-NVM preparation.The effect of the structure of the composite gate insulator layer on the field-effect mobility,memory window,and memory current ON/OFF ratio in the memory is systematically studied.The physical mechanism is analyzed that the composite ferroelectric gate insulator layer based on P(VDF-TrFE-CTFE)/AlOx/PMMA can increase the controllability of the polarization degree of the ferroelectric film by the setting Erasing/Programming voltage,thereby obtaining multi-level storage functions.The experimental results showed that the field-effect mobility of Fe-OFET-NVM prepared on a paper substrate was up to 0.92 cm~2/Vs,and a 4-level(two-bit)data storage function was obtained in a single memory cell by a setting 4-level Erasing/Programming voltage at+40,-20,-30,and-40 V respectively.The multi-bit Fe-OFET-NVM exhibited a reliable 4-level Erasing/Programming cycle endurance up to 100 cycles,and a stable 4-level data storage retention time over 20,000 seconds.The multi-level Fe-OFET-NVM prepared on the paper substrate also exhibited good uniformity,moisture resistance,heat resistance and long-term life stability.The research results provide a good solution for overcoming the two bottlenecks,such as high Erasing/Programming voltage and low field-effect mobility,that severely restrict the development of Fe-OFET-NVM.