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Research On Digital Watermarking Method And Real-time Detection Technology For IP Circuit Copyright Protection

Posted on:2021-10-29Degree:DoctorType:Dissertation
Country:ChinaCandidate:W H HuangFull Text:PDF
GTID:1488306122478914Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
Digital integrated circuit(IC),especially field programmable gate array(FPGA)protection technique is a kernel issue in development of semiconductor technology.Although some technical product is widely used in many companies and research institutes,lots of security threats still exist in IC protection.Consequently,it is an urgent problem in hardware security to address FPGA IP protection and real-time authentication.In this work,the theories in information hiding,cryptography,digital forensics are used in several IC protection algorithms.On this basis,several robust intellectual property(IP)watermarking techniques are researches.The main contributions are listed as follows.(1)To address the issues in security and robustness of FPGA IP watermarking techniques,this work proposed a robust two-dimensional chaotic mapping based IC watermarking algorithm.A chaotic mapping based secure model is designed and the aggregation degree of resource locations in IP design is also defined.Before embedding ownership information,the aggregation degree of used resources should be firstly calculated.A effective watermark embedding algorithm is selected on basis of the difference in aggregation degree of used resources.It makes the IP watermark embed around the area of used resources.Under the control of two-dimensional chaotic mapping secure threshold parameter,the algorithm will generate a two-dimensional chaotic sequence for determining the watermark positions and watermark bits of each sub-watermark.The chaotic based secure model not only improves the concealment of watermark,but also enhances the ability against attacks.Experiments show that,the proposed algorithm has good performance in security and robustness.(2)To address the issues of high embedding overhead and low resource utilization,this work proposed a dynamical compressed IP protection scheme.It processes the watermark in advance according to the unused resources of FPGA circuit.After that,we establish the reconfiguration relationship between n sub-secrets and compressed watermark S.The sub-secrets are then dynamically inserted into watermark Sn.In(t,n)threshold secret sharing scheme,t is regarded as reconfiguration factor.Finally,the inserted IP watermark can be extracted and detected by activating the decoding function.Experiments show that,this scheme can extend the watermark amount.Besides,the watermark overhead is greatly reduced and the robustness of the scheme is enhanced.(3)To address low real-time performance issue of IP protection in Io T environment,this work proposed a support vector machine(SVM)based virtual IP watermarking method for fast watermark detection.This algorithm combines the mapping function technology and SVN technology in deep learning.On this basis,the IP copyright information is preprocessed.The ANN algorithm in neural network is utilized to train the distance characteristic vectors of IP circuit.Then,the characteristic func tion of virtual position for IP watermark is generated after training.In IP ownership verification,the deep learning model can fast locate the range of virtual watermark positions.With the characteristic values of the virtual positions in each LUT area and surrounding areas,the mapping position relationship can be calculated by using the supervised method in neural network.It can realize fast location of real ownership information in an IP circuit.The experimental results show that the detection algor ithm can effectively improve the speed of watermark detection.The security and real-time performance are also encouraging.(4)For existing FPGA IP watermarking algorithms,watermark detection is easy to destroy the circuit structure and bring security pr oblems.From this view,a quadratic matrix transformation model based reversible IP watermarking is proposed.This algorithm firstly constructs a reversible mapping function on basis of quadratic matrix transformation.This function can map the original wa termark into a group of reversible mapping factors.These factors will combine as reversible watermark sequence and add into IP watermark.After that,the watermark embedding positions can be obtained from the redundant LUT resources by searching algorithm.The watermarks are then inserted into these positions.Meanwhile,the watermark positions can be transformed with quadratic matrix to enhance the concealment of watermark.Finally,experimental results show that the proposed scheme can effectively restor e the original watermark with different destruction rate of watermark.Besides,it achieves good performance of high security,concealment and robustness.
Keywords/Search Tags:IC, FPGA circuit, two-dimensional chaotic map, quadratic matrix transformation, multilevel virtual mapping, compressed coding
PDF Full Text Request
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