Research On Low-power And Reliability Technologies For Embedded Systems

For decades,embedded systems have been the main technology in the aerospace and defense,automotive,medical equipment,communications and industrial automation industries,is the cornerstone of digital networking intelligence in manufacturing.The development of real embedded system software technology is of great significance for China’s industrial sector to achieve independence.In the emerging field of Industry 4.0,from "Made in China" to "intelligent manufacturing",embedded systems occupy a major strategic position.With the maturity of processor architecture,more powerful computing power of microprocessors embedded in systems and devices,the system is developing in the direction of information,intelligence and networking,which makes the performance and scale of the system grow exponentially.Although battery technology has been improving steadily in terms of lifetime and size,the development is still not as fast as the rapidly growing power demand,and the higher energy consumption of the system has become a major problem.On the other hand,as microprocessor process technology enters the nanometer level,more semiconductor components are integrated onto a single chip,and the noise margin of the processor becomes smaller and smaller,making the internal components more susceptible to transient errors that can lead to operational failures.Therefore,energy consumption and reliability become the key considerations that must be taken into account in the design of the new generation of embedded systems.In this paper,we study the energy consumption optimization and reliability of embedded systems by combining real-time scheduling theory,Dynamic Voltage Scaling(DVS),Dynamic Power Management(DPM),and compiler technology.In the task scheduling of embedded real-time systems,low-power scheduling algorithms for the periodic task model and low-power and reliability co-optimized scheduling algorithms for the mixed task model are investigated.For embedded system applications,a lightweight soft error detection method and a comprehensive soft error tolerance technique are investigated using compiler technology.The feasibility and effectiveness of all the studies in this paper are experimentally verified.The main research content of the paper includes the following aspects:First,for the periodic task model of embedded real-time systems,the low-power scheduling algorithm LPABOWSA based on Earliest Deadline First(EDF)is proposed.this scheduling algorithm uses DVS and DPM techniques to reduce the processor speed by calculating the recovery idle utilization in the offline phase,and the dynamic salck time in the running phase according to the recovery of tasks and according to the ratio of WCET of tasks in the ready queue to The processor speed is dynamically adjusted to reduce the energy consumption by allocating the salck time according to the reclaimed dynamic slack time of the tasks in the ready queue.The experimental results show that the proposed algorithm saves about 10.7% and 4.6% of energy consumption on average compared to the DRA and ASTALPSA algorithms,respectively.In addition,this study also proposes a low-power scheduling algorithm LPABOBF for periodic tasks based on the balance point to address the problem that the critical speed policy may cause an increase in energy consumption.this algorithm fully recovers all static slack time and dynamic slack time according to the characteristics of the periodic task set.The critical speed is not necessarily the speed that makes the system consume the least amount of energy because there is an overhead in processor switching due to the combination of DPM technique to shut down the processor at the appropriate time.When the processor speed is less than the critical speed,the LPABOBF algorithm determines whether to use the DVS processor speed or the critical speed based on the balance point.The experimental results show that LPABOBF saves 8.9%～26.19% of energy consumption than the existing DRA algorithm and about 2.7%～13.98% of energy consumption than the DSTRA algorithm.Second,the low-power and reliability co-optimized scheduling algorithm RLPMABC is proposed for the hybrid task model of embedded real-time systems.the scaled supply voltage using DVS technology makes the processor more vulnerable to soft errors,so it is necessary to take reliability into account along with low-power techniques.the RLPMABC algorithm uses constant bandwidth server scheduling to involve non-periodic tasks in the periodic task scheduling with full consideration of reliability factors.Before slowing down the processor,backup tasks are assigned to the executed tasks using slack time in advance.In the offline phase,two heuristics are proposed based on the idle utilization: Small Utilization First(SUF)and Large Utilization First(LUF)to select the tasks using DVS technique and assign backup tasks to the tasks.In the operation phase,the slack time of cycle tasks and constant bandwidth servers are fully recovered to further assign backup tasks and reduce energy consumption for other tasks.The experimental results show that the RLPMABC algorithm saves 20.8% to 54.6% of energy consumption than the NODVS-CBS algorithm,while the average failure rate is about 1.5% to 11.8% of it.Third,a lightweight soft error detection technique,LEDRMT,is proposed to address the need for soft error detection techniques for embedded systems.reliability of embedded systems is often the most important aspect to consider in design.The occurrence of transient errors(soft errors)may lead to uncertain running results of programs.However,backup task-based scheduling techniques can not detect Silent Data Corruptions(SDCs),which cause erroneous runtime results without producing any unusual performance.Program instruction-level techniques can be implemented flexibly at the compiler level and can effectively detect SDCs.Redundant MultiThreading(RMT)based on compiler implementation has been considered an effective soft error detection technique in recent years.The principle is to run a copy of the program code in the Sophere of Replication(SOR)on two processor cores simultaneously and to detect errors by comparing the relevant result values of the two threads at the detection point.Existing RMT soft error techniques for compilers suffer from insufficient error coverage or excessive runtime overhead.Among them,the time overhead mainly comes from the synchronization operation between the main thread and the redundant threads.This study completely removes the wait operation of the main thread for the redundant thread in the prior art,and redesigns the result comparison mechanism between threads by adding an in-thread copy for memory read instructions,and an in-thread read check for memory write instructions.The soft error injection experimental results show that the proposed LEDRMT technique reduces the runtime overhead by 45.07% without losing SDC coverage compared to the most stringent RMT soft error detection technique.Fourth,a comprehensive soft error tolerance technology FERNANDO is proposed for the needs of embedded system fault tolerance technology.soft error detection technology does not correct errors during operation,which brings trouble to the later debugging work.A complete soft error tolerance technology needs to include soft error detection and soft error recovery.Most of the latest software RMT fault tolerance techniques are based on majority voting mechanism of result values.They are not effective in detecting errors in memory instructions.In the latest RMT technology FISHER,the error recovery process may result in a failed recovery.All the above weaknesses can lead to SDC.This study patches the vulnerabilities in error detection as well as recovery based on the compiler implementation of the RMT faulttolerant technology FERNANDO,which includes an error detection mechanism for full register values at the detection point and an error recovery mechanism for full system state.The soft error injection experimental results show that the proposed technique FERNANDO can reduce the SDC chance by 86.67% and optimize the execution time overhead by 19.64% compared to the latest RMT fault-tolerant technique FISHER.