| With the continuous progress of the very large-scale integrated(VLSI)technology,the geometry of complementary metal-oxide-semiconductor(CMOS)is scaling into the physical limitation.How to expand the functionality of the transistor under the target power supply,i.e.,integrate more functions in a single device unit or even a chip,has become an emerging hot spot and long-term goal of the semiconductor and technology industry in the post-Moore era.As a kind of novel multi-functional device at transistor level,the reconfigurable field-effect transistor(RFET)has the advantage of exhibiting N-type or P-type characteristics on a single device,which can implement equivalent combinational logic functions with fewer quantities of transistors compared to the CMOS technology.And therefore,RFET has been regarded as one of the great candidates which can contribute to the roadmap extension of transistors in the post-Moore era.However,many aspects of RFET still need to be systematically studied currently according to the results of current researches,such as the on-state driving current,the symmetry of N-type and P-type characteristics,the complex impact of intrinsic process fluctuations,and the compact model.Because of the above scientific and technique issues,this paper carries out in-depth research on RFET structure design,physical mechanism,process fluctuation,and device model.The specific studies are listed as follows:Firstly,a novel arch-shaped asymmetrical RFET structure has been proposed,based on the tunneling mechanism of the RFET.By extending the source region into the nanowire channel in an arched cylindrical shape,the ION is supposed to increase due to the total tunneling area,and meanwhile,the off-state current(IOFF)hardly degrades compared to conventional RFET.The impact on the tunneling strength,tunneling area,serial resistance,and gate capacitor(Cgg)induced by various geometries of the arch-shaped source was investigated in detail.And the overall performance of arch-shaped RFET was evaluated.It is demonstrated that the arch-shaped RFET could improve the ION by about 6.72 times for N-type and 5.39 times for P-type,in the meantime reducing the propagation delay by 51.9%in basic combination logic applications,compared to the traditional symmetric RFET.Therefore,the arch-shaped asymmetrical RFET has better comprehensive characteristics.Secondly,based on the working principle of the Schottky barrier,the work-function modulation of four terminals in RFET is investigated to meet the high requirement of symmetric N-type and P-type characteristics,by tweaking the metal work-function of source,drain,control gate,and program gate independently.The work-function of each terminal that governs the variation of the RFET’s key electrical properties is analyzed in both N-and P-configuration.It is discovered that ION is mainly dominated by control gate and source work-function,while IOFF is dominated by program gate and drain work-function,and the influence on N-and P-type of work-function is opposite.With the work-function regulation of four terminals in RFET,more flexible electrical characteristics among both N-type and P-type can be obtained,and an RFET with strict symmetric on-state current and ION/IOFF ratio,i.e.,(ION)N:(ION)P=(IOFF)N:(IOFF)P=1:1,has been realized in this work.Furthermore,the corresponding performance of work-function modulation in basic logic and memory circuits is discussed.Thirdly,the impact of intrinsic process fluctuations on RFET is investigated based on common intrinsic process fluctuations in deep nanoscale technology.Three kinds of process fluctuation sources,including line edge roughness(LER),gate edge roughness(GER),and work-function variation(WFV)are performed.In the study of LER and GER,a simulation evaluation method for RFET that firstly generates process fluctuation by Mat Lab algorithm and then embedded into TCAD was proposed.The electrical properties and their statistics and correlation are analyzed.The variation of ION due to LER presents a weak correlation with that of IOFF.Performance variation caused by GER is mainly attributed to the control gate edge roughness.WFV in the control gate and source dominates the variations of on-state characteristics such as ION,while WFV in the polarity gate and drain dominates the variations of off-state characteristics including IOFF.In general,the total overall performance fluctuations are primarily attributed to WFV.And because WFV may appear in four terminals of RFET,then WFV should be paid more attention to.Fourthly,based on the working principle of the RFET,a potential-based current-voltage analytical model of RFET is proposed to relieve the lack of the compact model.Based on the Poisson equation of the nanowire channel section of RFET,the nanowire channel is divided into three regions underneath the control gate,program gate,and gate isolation.Then,the dependence between carrier density and gate voltage bias is obtained.The surface potential along the channel can be solved using the quasi-Fermi energy and Schottky junction boundaries.The current-voltage performance can be carried out with the law of tunneling current and hot carrier emission of Schottky junction.In this paper,TCAD numerical calculation is used to verify the accuracy of the surface potential and current of the analytical model.The results show that the surface potential-based analytical model can accurately characterize the N-type and P-type electrical characteristics of RFET.And when the physical parameters of RFET scales,the differences of critical on-state and off-state between the analytical model and TCAD are less than 2.2%and 7.7%,respectively,ensuring good accuracy upon the device geometries scaled.The structure and parameter optimization,process fluctuation characteristics,and physical analytical model of RFET are well studied in this dissertation using 3-D TCAD numerical calculation.And the electrical characteristics optimization strategies,the electrical characteristics response of process fluctuation,and an accurate analytical model are proposed,indicating the great value for RFET optimization and application,also providing a novel method for RFET-based circuit and system design in the future. |