Research On The Optimized Modulation And Control Strategies For Interleaved Parallel Inverters

This paper takes the interleaved parallel inverters system as a research object,and proposes a series of optimized modulation and control strategies.The aim of this paper is to improve the performance of the parallel inverters,and realize the cost reduction and efficiency increment.The main research contents of this paper are as follows:1)An improved DPWM strategy is proposed to achieve multi-objective optimization for two interleaved parallel inverters.The two interleaved parallel inverters are equivalent to a single three-level inverter,which exists redundant voltage vectors.This paper analyzes the effects of different three-level voltage vectors,two-level voltage vector combinations,and switching sequences on the resultant current ripple,zero-sequences circulating current(ZSCC)and switching losses.On this basis,the appropriate voltage vectors and switching sequences are selected to optimize the above metrics.The detailed performances are compared with the existing modulation strategies.Finally,experiments verify its effectiveness.2)A distributed carrier synchronization method with high precision and reliability is proposed.When the frequency deviation of the crystal oscillator is considered for modular parallel inverters with local control units,the carrier phase shifting angle between the parallel modules will be time-varied,resulting in the time-varying resultant current ripple.To meet the requirement of carrier phase shifting with high precision and high reliability,a distributed carrier synchronization scheme is proposed in this paper.Firstly,the influence of the controller crystal oscillator frequency deviation on the resultant current ripple is quantitatively analyzed.Then,the proposed scheme is described in detail in three aspects,i.e.,the generation mechanism and anti-interference of the synchronous signal,the compensation of the carrier phase error,and the design of carrier synchronization controller.After the carrier synchronization is realized,the interleaving can be realized simply by adjusting the carrier phase shifting angle,thus improving the grid current quality.This method is further extended to the islanded parallel inverters,and proposes a fundamental and carrier phase synchronization method based on a single synchronous bus,which avoids the start-up inrush current and the high-frequency ZSCC.Finally,experiments verify the effectiveness of the proposed methods.3)A high and low frequency ZSCC suppression method free from communication is proposed.Firstly,the equivalent circuit model of ZSCC is established.Secondly,the issues of SVPWM and traditional interleaved zero-vector modulation are investigated,and an improved interleaved zero-vector modulation is proposed,whose PWM sequence of the fixed phase leg is arranged reversly to avoid the transition of PWM sequences at the sector boundary.Aiming at the suppression of low-frequency ZSCC,the impedance-based stability criterion of ZSCC is established considering the varying number of parallel inverter modules,and followed by the detailed parameter design of the plug-in repetitive controller.Finally,experiments verify its effectiveness.4)Aimed at the ZSCC resonance for parallel interleaved inverters with bypass capacitor based leakage current mitigation.First,the common mode equivalent circuit model of the modular interleaved parallel inverters is established.The generation mechanism of ZSCC resonance is investigated based on the installed ZSCC impedance model.To guarantee the stable operation,the resonance suppression method by shifting the sampling instant and phase lag compensation is proposed.The frequency aliasing phenomenon and resultant ZSCC dc offset issue due to the sampling instant shift are further analyzed,and an effective suppression scheme of the ZSCC dc offset is proposed by adding an additional ZSCC dc offset control loop.Finally,experiments verify its effectiveness.