Research On Device Structure And Radiation Mechanism Of Low-Loss Power MOSFET

Power MOSFETs and power integrated circuits with them as the core are the key to the electric energy management and voltage conversion in power electronic systems and are widely used in consumer products,industries,automobiles and aerospace,military,and other significant demand.Regardless of the applications,the power MOSFET as the"heart"of the power management directly affects the overall performance of the system.Therefore,the structural design of the device is extremely important.With the increasing application demand,while pursuing the improvement of cell pitch and power density,higher design tolerance and better dynamic characteristics have become the key to the design.Many studies indicated that the shrinking of the design window caused by cell scaling down brings severe challenges to optimization and process control.At the same time,the dynamic characteristics represented by the gate capacitance are particularly important in switching applications,which are closely related to the easy use and efficiency of the device.These have become a research hotspot for advanced low-loss device structures.In addition,advanced low-loss power MOSFETs with new technologies have become the trend of choice for next-generation aerospace and military applications.The new technologies bring breakthroughs in performance but also face unique challenges in the radiation environment.Power MOSFETs must operate stably in harsh radiation environments while realizing low power loss,so there is an urgent need to study radiation effects and their mechanisms.This dissertation focuses on the research of low-loss power MOSFET.The new structure of high-tolerance super junction（SJ）MOSFET and the space competition mechanism and modulation method of capacitance are proposed.The tape-out and radiation experiments are carried out to reveal the degradation mechanism and explore hardening methods.The main innovations are as follows:1.Carry out research on SJ MOSFET.A novel SJ MOSFET with a small cell pitch is proposed.The active cell adopts a novel five-step-shaped non-uniform doping distribution to suppress the electrical field degradation caused by imbalanced charges.A new termination with resistive field plate（RFP）is proposed.Through assisted depletion effect of the RFP-introduced dynamic electric field,the fragile charge balance of the lateral connection layer is significantly improved.The design window of the P-pillar in termination is extended to be consistent with the active cell,which effectively alleviates the trade-off between the breakdown voltage and the tolerance of SJ charge balance.In addition,a novel competition mechanism between drain to source capacitance(C_DS)and gate to drain capacitance(C_GD)is proposed.Based on this,the additional P-type implantation technology is introduced to realize flexible modulation of capacitance characteristics.While not significantly affecting the charge balance,the switching speed is improved,and the switching loss is reduced without overshoot degradation.Based on the multi-epitaxy platform,a series of devices with breakdown voltages of 600 V,650 V,and 700 V are experimentally obtained.The specific on-state resistance is less than 12mΩ·cm²,reaching the advanced level.The developed SJ MOSFET achieves both low power loss and ease use.Based on these,the study of single event radiation effect on small-pitch SJ is carried out.The changes in parasitic transistor amplification and charge exporting ability caused by structural adjustment of cell scaling down are revealed.The mechanism of single event burnout degradation in small-pitch SJ devices is elucidated,thereby guiding hardening design.2.Aiming at medium and low voltage applications,research on split/shield gate trench（SGT）devices is carried out.Degradation mechanisms of leakage current and breakdown voltage induced by total ionizing dose（TID）radiation in SGT MOSFETs are experimentally discovered and revealed.Design and tape out a low-loss 30 V SGT power MOSFET with good static and dynamic performance.The TID experiments are carried out by gamma radiation source.The hole capture rate in the oxide is extracted experimentally to evaluate the quality of the trench gate oxide layer,thereby realizing the TID simulation in different dielectric layer environments.The dominant role of the transition region isolation oxide layer in the leakage current is revealed through structural analysis and zonal calculation.The leakage current path introduced by oxide-trapped holes is located in the transition region near the thick isolation oxide layer between the switching gate and shield gate.Besides,the comprehensive mechanism of TID-induced breakdown voltage degradation is revealed for SGT MOSFET.The novel experiments with negative gate voltage bias indicate that the trapped charge of the shield gate oxide layer has a significant influence on the effective concentration of the drift region.The breakdown voltage degradation is not only caused by the punch-through effect but also is closely related to the degradation of Reduced Surface Field（RESURF）optimization.Finally,based on these mechanisms,three TID hardening methods of process,layout,and concentration design are proposed according to degradation types.3.Carry out research on high fluence neutron radiation of low-loss integrated MOSFET.The drift region energy band model with displacement damages is established,and a new concept of drain threshold voltage(V_DT)is proposed.The output current cut-off effect caused by high fluence neutron radiation is discovered and revealed for the integrated power MOSFET.Experimentally obtain low-loss integrated lateral MOSFET using thin-layer Silicon-On-Insulator（SOI）technology.High fluence neutron radiation research at 10¹⁴ n/cm² level is carried out through the reactor.Combining model analysis and simulation,the energy band model with multi-level defects is established in the drift region to reveal the mechanism of the potential barrier caused by high empty rate traps under high neutron fluence.The potential barrier cuts off the current path and leads to output collapse.Besides,the mechanisms of the current recovery and current climbing as drain voltage increases are revealed.The drift region conduct band under different drain bias conditions is analyzed in detail,and neutron radiation simulations and experiments with various drift region lengths and concentrations are carried out.In addition,the qualitative calculation formula of V_DT is proposed to unify the mechanism of neutron radiation degradation under high and low fluence.The mechanism for cut-off immunity at low fluence and the influence of different structural parameters on the cut-off effect are clarified.The formula theoretically guides the design of high-fluence neutron radiation hardening for high voltage lateral power devices.