Research On Integrated Gate Driving Strategy And Critical Technology Based On The SiC MOSFET

Si C MOSFETs have excellent characteristics in HV(high-voltage)and high-power applications,such as fast switching speed,low energy loss and good high temperature characteristics,etc.which have an excellent development prospect in automotive electronics,green energy and industrial fields.So far,the traditional Si MOSFET passive driver and active driver on the PCB board are usually used in Si C MOSFET driving technology.Drawbacks of traditional Si MOSFET drivers not only reduce the switching speed but also not play the excellent performance of Si C MOSFET.The active driver on the PCB board has limited improvement for Si C MOSFET’s switching performance.In order to better play the high-speed switching characteristic of Si C MOSFET and reduce EMI noises,the integrated driver strategy is proposed to improve Si C MOSFET’s switching performance according to device characteristics and the integrated circuit knowledge.Then,the Si C MOSFET integrated dynamic multi-level driver is realized.Three main innoations are summarized as follows:HV sub-ns(sub-nanosecond)level shifters for different applications are proposed.Existing HV level shifters have a slow response speed,which are also not suitable for closed loop driver.In the dissertation,a HV sub-ns level shifter is proposed based on edge detection technique.The auxiliary circuit and digital select circuit are also used to make the HV sub-ns level shifter with HF(high-frequency)characteristics and self-calibration function.The d V/dt noise immunity of HV sub-ns level shifter is limited by the application environment,so an ultra HV level shifter with d V/dt noise shiedling is proposed.The sub-ns level shifter was fabricated and tested in a 0.5μm BCD process,occupying a 0.024 mm~2 active area.The test results show that the average delay of the proposed sub-ns level shifter is only 664 ps and its FOM is only 0.044 ns/(μm×V)when the power supply voltage is 30 V.Meanwhile,the proposed sub-ns level shifter can achieve the 250 V/ns d V/dt noise immunity under a 30 V power supply voltage.The level shifter with d V/dt noises shielding function can shield any d V/dt noises under a 400 V power supply voltage,and its delay time does not exceed 1.5 ns.An integrated dynamic multi-level driver for Si C MOSFET is proposed.A suitable gate driver is essential for Si C MOSFET’s excellent performance.In the dissertation,based on the Si C MOSFET’s characteristics and parasitic effect,the closed-loop integrated dynamic multi-level gate driver is realized for Si C MOSFET using the HV sub-ns level shifter with self-calibration function.Then,the information of Si C MOSFET can be fed back in time,and Si C MOSFET’s switching speed can also be adjusted.So,Si C MOSFET can realize high-speed switching and low EMI noises.The integrated dynamic multi-level gate driver for Si C MOSFET has been verified in a 0.18μm BCD process with a chip area of 4.16 mm~2.Si C MOSFET’s switching performance has been experimentally verified in a 600 V HV power supply and load current from 15 A to 90 A.The test results show that the proposed integrated multi-level gate driver can make the Si C MOSFET achieve excellent switching performance under different applications.Such as less than 2 A/ns peak di/dt noises,less than 50 V/ns peak d V/dt noise,less than3.5 m J energy loss,and about 200 ns switching time.A fast short protection circuit with soft turn-off is proposed.Si C MOSFETs face serious reliability problems in the short-circuit fault due to its drain-source current unsaturation characteristics.Whether the Si C MOSFET is in short-cricuit fault can be judeged according to the EMI noise’s difference between normal operation and short-circuit fault.When the Si C MOSFET is in the short-citcuit fault,Si C MOSFET is slowly turned off immediately.The proposed fast short protection circuit with soft turn-off is simulated in a 0.18μm BCD process,indicating that the proposed protection circuit can respond to any Si C MOSFET’s short-cricuit faults within several nanoseconds turn off the Si C MOSFET slowly.The dissertation aims to maximize the Si C MOSFET’s switching performance in HV and high-power applications.A series of HV sub-ns level shifters,an integrated dynamic multi-level gate driver,and fast short protectin with soft turn-off are proposed.The proposed theory and circuits are verified by the integrated circuit design,simulation,and experiment methods.