Designs And Model Researches Of Novel High Energy-efficiency Three-input TFETs

With the in-depth development of the third scientific and technological revolution,some new computing paradigms and new scientific and technological applications,such as big data,Internet of things,artificial intelligence,autonomous system and Exascale computing,all put forward higher performance and efficiency requirements for integrated circuit chips.The integrated circuit industry with CMOS as the core can always follow the development of Moore’s law,which is due to its good switching performance while scaling.However,with the process size of CMOS approaching the physical limit and the leakage current increasing exponentially,and the power consumption problem caused by size reduction has become the biggest obstacle to the advancement of the integrated circuit industry.For example,the 10 th generation core i9-10920 x Series CPU recently launched by Intel has exceeded 200W/cm2.Tunneling field effect transistor(TFET),which takes inter band tunneling as the main carrier transmission mechanism,can break through the energy consumption limit of traditional CMOS and realize a subthreshold swing lower than 60 m V/dec at room temperature.It can also reduce the leakage current because of its conduction mechanism of carrier heat injection different from traditional transistors.The TFET is compatible with the current mainstream CMOS integrated circuit process,it is considered to be the most potential to replace CMOS as the next generation mainstream logic device,which has attracted great attention in academia and industry.However,the on current of silicon-based TFET is too small at low power supply voltage,especially with the continuous reduction of transistor characteristic size and power supply voltage,and the current degradation is particularly serious.In order to further improve the efficiency of silicon-based TFET circuit,a feasible method is to realize some specific logic functions in a single TFET device to improve the efficiency of a single TFET transistor,rather than simply scaling the TFET.(1)In order to expand the logic function of a single transistor,a new three input TFET device with three input “Majority” switching logic behavior and three input“Minority” switching logic behavior is proposed.We improve the channel structure of traditional single gate TFET,so that the gate can accept three different bias voltages at the same time.The improved thin inverted t-channel increases the ability of the gate to control the channel electrostatic potential,and the effective tunneling area increases accordingly.Therefore,large tunneling current,steep subthreshold swing and low leakage current are realized on silicon-based TFET.Through the configuration strategy of bias voltage,a single "minority" logic three input TFET can provide variable on current and threshold voltage without increasing the power supply voltage,so as to meet the needs of multi threshold technology and dynamic frequency circuit design.So as to realize low power consumption and high performance circuit design.The reconfigurable circuit between NAND gate and NOR gate can also be constructed by using two three input "majority" TFET devices.(2)A new closed-form full-analytic current model and HSPICE model for three-input TFET devices are presented.The proposed model fully covers the physical characteristics of the new three-input TFET devices.The calculated results of the model are in good agreement with the TCAD simulation results,and the characteristics of the devices can be predicted within a wide range of parameters.By introducing the relevant capacitance model,raster leakage current model and noise Acoustic model,the HSPICE model of the device is constructed,which shows good convergence,compatibility and simulation efficiency on the HSPICE circuit simulation platform.The HSPICE model proposed can be used for three-input TFET circuit-level simulation and circuit performance optimization,and can also complete the device-circuit co-simulation to guide device and circuit optimization.(3)The performance of digital standard cell circuits based on three-input TFET devices is studied,and the potential of the devices in low-power and high-energy efficient circuits is demonstrated.Using the rich and diverse logic features of three-input TFET devices,a compact digital standard cell circuit structure with distinct features is constructed.A simple introduction to a synthesis capable of handling the majority/minority logic of a quaternion network is given.