Research On Key Technologies Of Agile Design For Memristor-Based In-Memory Computing

As the integrated circuit industry enters the post-Moore era,the development direction of chips is gradually shifting from computing performance to energy efficiency.However,in the traditional von Neumann architecture,the process of data transferring between computing units and storage units consumes a lot of energy,limiting the energy efficiency of the chip.As an emerging memory device,the memristor has non-volatile storage characteristics and high integration density.It fuses storage and computing in the same device,providing an “in-memory computing” paradigm,thereby reducing the transmission overhead between computing and storage units and improving energy efficiency.With the rapid increase in the scale of applications(e.g.,neural networks)and the continuous innovation of material and fabrication process,memristor-based in-memory computing circuits and systems need to shorten the design cycle to achieve the co-optimization of devices,circuits,and systems.This dissertation focuses on the four key stages including data mapping,behavior simulation,device modeling,and physical design in the design of memristor-based in-memory computing.The research on agile design and electronic design automation technologies is conducted.The main contributions are as follows:Firstly,a mapping method between memristor devices and convolutional weights is proposed.Using the data reuse mechanism,we propose to copy the same convolutional kernel and arrange them in a staggered manner,which reduces the number of digital-to-analog conversions and improves parallelism at the same time.On this basis,an inter-layer pipeline balancing algorithm is proposed to improve energy efficiency and area efficiency,thus supporting the automatic mapping between memristor devices and weights in convolutional neural networks.Furthermore,using the weight redundancy introduced by the proposed mapping method,a kernel synchronization method is proposed to improve the classification accuracy of the convolutional neural network under the random variability of memristors.The results show that our proposed methods improve the area efficiency by 6.8times,improve the energy efficiency by 2.1 times,and improve the classification accuracy by 21.7%.Secondly,an efficient memristor crossbar model for in-memory computing applications is proposed.Through theoretical analysis,we propose to convert the memristor crossbar modeling problem to a pixel-wise regression problem,and solve it by designing a convolutional autoencoder model.It learns the electrical behavior of the memristor crossbar with interconnect resistance and non-linear -(1 characteristic into consideration.At the same time,it can use the efficient deep learning framework to significantly increase the simulation speed.We further propose a modeling pruning method to reduce the computational cost.The results show that our proposed memristor crossbar modeling method reduces the runtime by 78 times and the memory requirement by 1.7 times with 0.28% average error compared to the SPICE simulation.Thirdly,a generalized and automated memristor device modeling method is proposed.By introducing a new state variable,the switching and conductive behaviors are decoupled,which are further modeled by using the artificial neural network technique.It reduces the need for the underlying physical knowledge of the device in the modeling process,thereby shortening the model development cycle.A compact model implementation method is proposed based on Verilog-A to support general circuit simulators.The results show that our proposed modeling method reproduces the behavior of physics-based memristor device models with an error of 3.6%.Furthermore,the compact models are adopted in circuit simulations including memristorbased logic gates and crossbar circuits,proving the effectiveness of our proposed method.Finally,a synthesis method for the memristor crossbar is proposed.The memristor crossbar is affected by the optical proximity effect during the lithography process.This results in a decrease in image quality,affecting the calculation results of the in-memory computing.The traditional resolution enhancement techniques cannot fully consider the characteristics of memristor devices to ensure the consistency of the electrical parameters.In this work,the impacts of different physical layout parameters on the electrical characteristics of memristor devices are analyzed.A dual-objective alternate optimization method is proposed to reduce the systematic variability of the lithography process.The results show that our proposed method significantly improves the accuracy and uniformity of the patterns compared to other heuristic optimization methods and the optical correction technique.