| To break through the integration density and energy efficiency bottlenecks of post-Moore’s Law integrated circuit devices,reconfigurable field-effect transistors(RFETs)with dynamic mode switching capabilities have become an important frontier topic in the field of microelectronics.Unlike traditional metal-oxide-semiconductor field-effect transistors,RFETs can dynamically switch the doping type of the device based on external input signals,thereby possessing the dynamic reconfigurable ability of device operation modes(N/P type).Therefore,the dynamic reconfigurable ability of device hierarchy can support programmable functional circuits under fixed hardware structures,which is expected to achieve an upgrade in integrated circuit functionality,integration density,and even energy efficiency.Currently,the reconfigurable function of RFETs is mainly realized based on programmable electrical doping technology,and the device operation mode is extremely dependent on the programming gate(PG)bias signal.This leads to deteriorating circuit power consumption and layout wiring complexity.In addition,facing the increasingly severe energy efficiency requirements and size scaling bottlenecks in the post-Moore’s Law era,the development of high-energy-efficient non-von Neumann architecture storage-computing integrated devices and circuits has also become one of the key technical approaches in the field of integrated circuits.This thesis aims to integrate high-functional-density RFET device structures and ferroelectric storage-computing integrated device technology as a means to address the energy efficiency requirements of post-Moore’s Law integrated circuits.Innovative research on non-volatile ferroelectric doping technology and reconfigurable transistors is expected to break through the size scaling bottleneck and the"energy efficiency wall"of von Neumann architecture in the field of integrated circuits.This thesis combines Sentaurus Technology Computer Aided Design(TCAD)simulation and micro-nanodevice experimental preparation to systematically study the feasibility,theoretical mechanism,and preparation process of ferroelectric doping technology and ferroelectric-doped reconfigurable field-effect transistors(RFETs).The specific contents include:(1)innovating the theory of ferroelectric doping technology and exploring its feasibility based on Sentaurus TCAD simulation tool,especially for its application in non-volatile RFET structures;(2)based on the common structure of RFETs,in-depth exploration of the preparation process of ultra-thin channel RFETs based on fully depleted silicon-on-insulator(FDSOI)substrate,and breakthrough in thermal budget management(≤400 oC)in the preparation process,serving the preparation and 3D integration application of ferroelectric-doped RFETs;(3)combining the above theoretical verification and preparation process exploration,experimentally preparing ferroelectric-doped RFETs,systematically characterizing the basic electrical characteristics of the devices,and innovatively achieving multiple dynamic reconfigurable operating modes:non-volatile reconfigurable logic devices,reconfigurable ferroelectric memories,and reconfigurable storage-embedded Boolean logic functional units.Ⅰ.Theoretical and Feasibility Study of Ferroelectric Doping TechnologyThis paper innovatively proposes ferroelectric doping technology,which uses the non-volatile storage characteristics of ferroelectric materials to replace the role of bias signals with ferroelectric programming gates(Fe-PGs)to optimize the cost of RFETs in circuits.Based on Sentaurus software simulation,this paper combines ferroelectric materials and electrical doping PG structures to achieve ferroelectric-doped devices with non-volatility and reconfigurability on advanced Nanosheets.The carrier concentration distribution of ferroelectric doping is obtained:(1)the high doping concentration formed by ferroelectric doping breaks through the solubility limit of silicon,but the Schottky barrier of RFETs limits the on-state current,and further analysis of ID-VD and ION-ND,max is obtained;(2)the doping concentration decreases exponentially in both the vertical and horizontal directions of Fe-PG,reflecting the Coulomb interaction between Fe-PG and carriers in the channel.The horizontal direction of the doping concentration forms a natural lightly doped drain structure,which suppresses short-channel effects and maintains this advantage during device size scaling.The doping concentration decreases vertically,reflecting the demand for ferroelectric doping and even electrical doping on ultra-thin channels,providing a theoretical basis for the selection of subsequent experimental substrates.Ⅱ.FDSOI-based Low Thermal Budget(≤400 oC)Electrical Doping RFETsBased on the theoretical research,this paper combines the doping range and process versatility,and uses ultra-thin FDSOI as the substrate of RFETs to explore the low thermal budget preparation process of electrical doping RFETs.The plasma technology of O2/NH3in atomic layer deposition(ALD)is used to replace the commonly used high-temperature thermal oxidation to complete interface passivation treatment.At the same time,long-term low-temperature treatment in the ALD chamber replaces annealing to complete the alloying of source and drain metals,and breakthroughly realizes the temperature management(≤400oC)of RFET processes compatible with 3D monolithic integration.In addition,the self-alignment process is innovatively used to form PG structures,providing a structural basis for the application of RFETs in embedded logic gates in 3D integration.Using the electrical signals of PG and control gate(CG)as the inputs of the logic gate,the function of switching between"AND"and"NOR"logic gates of a single RFET is developed.Ⅲ.Ferroelectric-Doped RFETs with Multiple FunctionsCombining the theoretical research of ferroelectric doping technology and the process foundation of electrical doping RFETs based on FDSOI,this paper replaces the PG gate dielectric Hf O2 of electrical doping RFETs with HZO ferroelectric material to achieve ferroelectric-doped RFETs,and systematically characterizes the dynamic reconfigurable ability of ferroelectric-doped devices in three operating modes:(1)non-volatile reconfigurable logic devices.The reconfigurability and non-volatility of the device are verified based on pulse timing tests,transfer characteristics,and output characteristics,and the non-volatility of doping is confirmed through retention tests.(2)Reconfigurable ferroelectric field-effect transistor(Fe FET)memory.Fe-PG serves as the switch of the memory,and a bias voltage is applied to CG to suppress bipolarity.The characterization results of the memory show that the storage windows of N-Fe FET and P-Fe FET as ferroelectric-doped devices are 1.28 V and 0.86 V,respectively.The window stability exceeds 104 cycles under strong stress pulses,and the lifetime exceeds 10 years,with symmetrical linear enhancement and suppression capabilities.(3)Reconfigurable storage-embedded logic gates.Combining the reconfigurable logic characteristics of ferroelectric doping and the reconfigurable memory characteristics,VPG,Pulse,and VCG are used as inputs,and ID is used as output.A single ferroelectric-doped device can realize embedded storage-embedded logic gates"AND"and"NOR",demonstrating the potential of ferroelectric-doped devices as non-von Neumann architecture basic units. |