| As the rapid development of integrated circuits(ICs)process and manufactory techniques,the feature size of ICs becomes smaller and smaller.Correspondingly,the supply voltage,node capacitance,and threshold voltage become lower and lower.The effects which used to be neglected have more severe impacts on ICs,and new reliability problems caused by them are more worthy of attention.The aging effect in ICs has always been a problem that cannot be ignored,and the process feature size reducing makes the impact of aging effect and the uncertainty caused by process variation(PV)more serious,which cannot be ignored.Meanwhile,with the development of manufacturing process technology,the occurrence of radiation effects such as single-event upset(SEU)and single-event transient(SET)caused by space particles in integrated circuits working in the space environment has become more frequent.The synergy when these effects are considered together makes it more difficult to predict the soft error rate(SER)of ICs and to perform the radiation hardened design.Therefore,this thesis mainly studies the parameters drift and functional failure of ICs caused by the synergy of Bias Temperature Instability(BTI)in the aging effect and process variation.Including mechanism analysis,radiation hardened design,soft error rate evaluation of circuit and monitoring circuit design,the main works cover:(1)Research on synergistic effects model of BTI and PV.With the scaling of ICs process,researches on the principle of aging effects and PV effect to ICs become more and more important.In the thesis,the change of the reaction-diffusion model of BTI effect under small size is deduced and analyzed,and the improved reaction-diffusion model and the statistical model of process variation under small process dimension are superimposed and analyzed,thereby establishing the mathematical model of synergy of BTI effect and process variation.The model can be applied to circuit-level radiation hardening technology and system-level circuit soft error rate simulation,so to predict the influence of synergy effect of BTI and process variation on integrated circuits better,and analyze and reinforce based on these.(2)Research on radiation hardening technology of memory cells considering BTI effect and process variation.As a kind of IC with a high frequency of use,the reliability of the memory cell under the synergistic effect of radiation environment and BTI effect and process variation becomes particularly important.In the thesis,according to the design principle of SRAM(Static Random Access Memory)cell,the problems of circuit parameter drift and radiation resistance performance reduction under the synergistic effect of BTI effect and process variation are analyzed,and a memory cell considering of BTI effect and process variation is proposed.With radiation hardening technology based on the anti-flip capability of the DICE unit,the circuit has reinforced the reading and writing parts of the circuit respectively.Through circuit simulation,it can be seen that the reinforced unit has an anti-single event upset and read noise tolerance under the synergistic effect of BTI effect and process variation.The writing tolerance have been greatly improved,as well.(3)A soft error rate evaluation method for digital circuits considering the synergistic effects of BTI effects and process variation is deduced.As the scale of integrated circuits continues to increase,the evaluation of the soft error rate in digital circuits in a radiation environment becomes more and more important,but there are few evaluation methods that simultaneously consider the synergistic effect of BTI effects and process variation,which makes predicting the performance of digital circuits and time to failure becomes more difficult.In the thesis,a method for evaluating the soft error rate in digital circuits considering the synergistic effect of BTI effect and process variation is proposed.The model of synergistic effect of BTI effect and process variation is added to the cell library through calculation and simulation,and parameters such as delay and critical charge are recalculated.While considering the electrical shielding,logic shielding and locking window shielding of the digital circuit,the circuit standardization calculation is completed to obtain the soft error rate result of the circuit.The method is compared with the soft error rate calculation method without considering BTI and process variation.In the sequential test circuit and the combined test circuit,the result obtained by this method is more accurate,and the soft error rate of the digital circuit can be better calculated.(4)A monitoring circuit design study considering BTI effects and process variation is designed.The thesis proposes a monitoring circuit to detect the circuit delay,aiming at the problem that the parameter drift of the device sub-threshold current and circuit delay caused by the synergistic effect of BTI effect and process variation shorten the normal working life of the circuit.Since the synergy effect of BTI and process variation will lead to changes in circuit parameters,the thesis uses the BTI effect and process variation synergy model to change the process library parameters,analyzes and simulates the changes of circuit sub-threshold currents and delays under different years,and responds by monitoring timing information with aging of the circuit. |