The Preparation And Effect Of The Porous Silicon On The Electrical Features Of Crystalline Silicon

The energy crisis was caused by the rapid development of modern industry. The development and application of the solar energy, which was the most ideal renewable energy, was an effective way to solve this problem. Currently, photovoltaic generation aroused most people's attention. However, impurities and defects will be introduced into the crystal silicon for solar cell during its growth process, and they had a great effect on the electrical properties of crystal silicon, which restricted the development and application of the photovoltaic generation. Reducing the impurities and defects in active area on the silicon surface and eliminating the effect of impurities and defects on the crystal silicon solar cell has become the research emphasis of the solar cell research field. Gettering was an effective way to reduce the impurities and defects and improve the silicon quantities. As one of the gettering method, porous silicon gettering used mismatching caused by porous silicon to form gettering center, the impurity atoms will diffuse to interface layer between the porous silicon and matrix after high temperature heat treatment due to the structure difference between the impurity atoms and silicon atoms. Eliminating the impurity and reducing the dislocations by removing the porous silicon layer with aqueous alkali in order to improve the electrical performance of the crystal silicon. However, the preparation method of porous silicon and experiment parameter had close relationship with the microstructure of porous silicon, and had great effect on the gettering result. So the porous silicon preparation method is still a problem which needs to be explored and solved. The preparation and effect of the porous silicon on the electrical features of crystal silicon by chemical etching was investigated in this paper.The surface morphology, porosity and the depth of porous silicon prepared by different concentration rate of HF and HNO3 and different etching time and effect of porous silicon on the electrical features of crystal silicon were investigated. The results were shown as follows:(1). Under the same etching solution concentration, only changing the etching time, we can know the aperture will increase as the etching time prolonged, and the big porous silicon will appear small pore with the wall of hole turn to be thinner.(2). With the same etching time condition, by changing the concentration of aqueous solution, it shows that there will be forming the porous silicon pattern and the pore diameter enlarge clearly on the silicon surface with the concentration of aqueous solution is low. There will only be polished when the ratio for the concentration of aqueous solution is 0.1, however, there will not be clear porous silicon pattern when the ratio is attained to 1, and the porosity and the depth for porous silicon will be raised firstly then reduced with the reduction of the ratio for the concentration of aqueous solution.(3). Under the same ratio for aqueous solution concentration, the porosity and the depth for porous silicon will be reduced with the reduction of the ratio for the concentration of aqueous solution, in other word, the porosity and the depth for porous silicon by etching 14min is lower than those by etching 11min.(4). The last and the most important part is observing the effect of the porous silicon on the electrical features of crystalline silicon, we can know this lab the minority carrier lifetime and the resistivity will increase for the formation of porous silicon on the crystalline silicon after heat treatment. Moreover, the resistivity increase to maximum after changing acid concentration by etching 11 min; for the contrast lab between monocrystalline with multicrystalline silicon, the minority carrier lifetime and the resistivity for monocrystalline high up more than of multicrystalline silicon.