DSP & Vision Detection Technology In Intelligence Automobile Driver-Assistance System

Owing to its intrinsic Pre-Accident Warning mechanism, Intelligence Automobile Driver-Assistance System has bright prospects, especially in high quality active automobile safety and accident avoidance measurement. The road driving condition which is Multi-Variables and complex environment requires high real-time quality, stability and limited space. The Driver-Assistance System that employs Computer Vision technology is one of the booming research fields, due to their extensive signal detection range, integrity and excellent "Quality-Cost" ratio.In this paper, discussion is mainly focused on the Hardware Application Policy of Intelligence Automobile Driver-Assistance System. A qualified product of the Intelligence Driver-Assistance System must display good real-time and easy-carry quality. Traditional equipment based on " Image Acquisition Card-PC-Execution Device" policy cannot meet the requirments above. After systematically analyzed the related research fields, a new solution is proposed, which is based on "DSP Image Acquisition-Processing" integrity policy. After summarized Digital Signal Processing and Digital Signal Processor technology, the device performances are compared, whose hardware application solutions are independently based on general CPU and DSP chips. According to the needs of different Image Processing Algorithms, a Real-time Image Processing Development Simulation Device is developed. In this equipment, a MCU controller is responsible for Digital Image Acquisition, realized stable data transmission between different running frequency units. The whole algorithm is simulated and optimized on DSP EVM board and CCS environment, which contribute to a seamless software transplant and hardware structure design.A DSP minimum system solution is proposed according to the Real－Time simulation results. A TMS320C 6711 DSP chip is adopted as the operation unit. External ROM, SDRAM and SBSRAM is constructed through its EMIF interface. The image data are stored and exchanged under an "Interruption & DMA" parallel mechanism, which can run simultaneously with DSP unit. Two different voltage power resources are provided for the whole system, which are watched by one surveillance circuit. System Anti-jamming and system optimization measures are added into system for future circuit debug.Video Acquisition Unit is constructed on Philips SAA7111 and FPGA chips. Input signal is standard video signal (PAL or NTSC). The brightness and color control can be adjusted through I2C Bus. With alternately storing and intercross address mechanism of two SRAM memory banks, the expensive FIFO memory is avoided and the image data can be stored in a consecutive address range, which can save lots of time in DMA transmission. At the same time, the image data format can be changed. Based on "Store-Processing Integrity" idea, a promoted Sobel operator is proposed. With full use of internal RAM resources and Pipeline mechanism, the image data can be convoluted with Sobel operator, and then the edge of the image data can be extracted entirely by hardware device. This method greatly promoted the efficiency. The solution can meet the requirements of system algorithm. A fast prototype can be built if a FPGA display controller is added, as well as realize algorithm and products encryption.