The Research Of Control System For Stepping Motor Using FPGA

This thesis is based on the project, the pure digital controlling system of VR step motor by the advanced designing technique of FPGA/CPLD. At first, the essay passes the progamme testing part on simulation, synthesis and downloading. Then it is applied in practice. By analyzing the working principle and controlling way of the step motor, and the designing principle of FPGA, Then the knowledge about Verilog HDL. All about this provides the scientific foundation for the paper.In order to achieve the aim at controlling the step motor, we design a kind of digit bit pulse which can be continuously adjusted. The signal is made up of two bigger module which is linked by the main module, and every module passes the simulation. The hardware is designed in module structure which offers convenience to maintenance of the system and enhances the expansibility of the system. The Verilog HDL which is understood easily is adopted for the paper. We adopt several kind of popular software now. Finally we obtain anticipant effect in designed experiment,which improves the correctness of the design. This thesis explains the technique of the Verilog HDL in practice.we bring forward several method to settle the matter which we offen find during the programming.we also narrate the method to choose the FPGA chip accurately.FPGA+Verilog HDL+EDA is the core of this paper.This technology is convenient, extensive and oecumenical in practice which will accelerate the development of the integrate circuit. This technology has the hearty life and the expansive foreground.The system is more compact and logical for the reason of pure digital controlling way.we can debug the system expediently for the reason ofpure digital controlling way.The essay is also attempt to utilize a kind of new technology.