Design And Simulation Of CMOS RF Inductor

With the rapid growth of wireless communication markets, Si RFIC is recognized as a fascinating candidate to meet the demands of low-cost, high integration, and mature technologies. Currently, technology scaling allows CMOS processes to operate at RF and a great effort is underway to obtain a monolithic solution that meets mobile telecommunication standard specifications. To date, most researches on CMOS RF circuits are focused on CMOS RF front-end including some key building blocks such as low-noise amplifier (LNA), mixer, band-pass filters, voltage control oscillators and power amplifiers.In RFIC, inductors need to be realized on a silicon substrate along with all of the other devices in a single chip. In fact, the need for high Q integrated inductors in RFICs is increasing. The aim of our research is to realize high-Q and high-resonant frequency monolithic inductors in standard or compatible CMOS technology and to carry out the integrated inductors in some novel CMOS RF ICs.The researches of integrated inductors and its related RF integrated circuits are presented reported in this dissertation. Main contents and results of the study are given as follows:1. The model of the inductor is the key for RFIC's simulation. After the lumped circuit models of inductor structures are given, the lumped elements parameters are extracted from known S parameters through three approaches. In additions, the extracted elements parameters are simulated and analyzed. So the best approach to extracting parameters is given through analyzing results.2. A novel method for reducing the substrate-related losses of integrated spiral inductors is presented. The method is to directly form thin shield ground under the field oxide to prevent the eddy currents induced by spiral inductors. The thin shield ground can be realized in standard or compatible silicon technologies. The impacts of the thin shield ground on inductors quality factor (Q) are studied, and simulation results show that the Q of the novel spiral inductor is more than 10 at 20nH of inductance.3. A novel structure of on- chip integrated microelectromechanical system (MEMS) inductors implemented in compatible CMOS process is presented as lateral solenoid. The top lines of the novel solenoid inductor are designed to"half middle bracket"shape, the bottle lines are designed to oblique lines. It makes efficient use of spacing between the turns. The inductance increases with increasing length of the top lines. The novel solenoid inductor is simulated, and simulation results show that the Q of it is more than 20.4. The fully integrated high-performance voltage-controlled oscillator (VCO) with on-chip MEMS inductor is presented. MEMS solenoid inductors have been designed from the CMOS-compatibleMEMS process. Fully integrated CMOS VCOs have been designed and simulated by monolithically integrating these MEMS inductors on the top of the CMOS active circuits biased on 0.25um CMOS process. Low phase noise has been achieved as -124dBc/Hz at 1MHz offset from carrier frequencies of 1.8GHz.