The Research Of Harmonic Measurement Realization Based On FPGA Hardware

In this paper, the design of the high accuracy and speed harmonic measurement system is based on the harmonic measurement theories and the realization techniques. The sources, features, classification and harms to the power system of harmonic are summarized, as well as the development, existing problems and difficulties of the different harmonic measurement theories and realization techniques. The Fourier transform algorithm is chosen and is realized with hardware on FPGA. A low-pass filter is designed to eliminate the aliasing, and the Digital Phase Locked Logic (DPLL) is designed on FPGA to synchronize the tested signal to minish the error caused by leakage effect, while, the affect of the picket-fence effect can be minished with the increase of sample numbers. To make further, the six channels parallel 16 bits high speed A/D converter is used, and the 256-point radix-4 FFT is used to compute the harmonic data. The multiplication cells and the storage design of radix-4 FFT are highly parallelized to farthest improve the speed of harmonic measurement. The A/D sampling and control logic, the DPLL and the radix-4 FFT and etc. are designed with VHDL and simulated with MAX+plusâ…¡software. The simulation result shows that the designed DPLL hardware is good for tracking the tested signal. With the K value is set as 1, an error only of 0.01% is caused at 180ms. And for simulation simplicity, the 16-point radix-4 FFT is simulated, which causes an error less than 0.05%, and takes only 2.4us.