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Design Of A High Efficiency Low Ripple Peak Current Mode Boost DC-DC Regulator

Posted on:2010-09-20Degree:MasterType:Thesis
Country:ChinaCandidate:J LiFull Text:PDF
GTID:2132360272982536Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Based on the project of Xidian University"Theoretical research on the key technique and the design for deep-submicron mixed signal ASIC", a low-cost, high degree integration Multiple-Output power supply controller XD1174 is proposed in this paper. The controller generates all the supply rails for the thin-film transistor liquid-crystal display panels in TVs and monitors. In order to generate the requisite voltage, both a positive and a negative charge pump are integrated to supply TFT gate driver supply voltage. The main Buck and Boost switching regulator generates the logic supply rail and the source driver supply respectively. The IC includes two high performance operational amplifiers designed to drive the LCD backplane (VCOM).Firstly, brief introductions to LCD are given and the practical power supply for it is discussed. Secondly, on the basis of deeply researching and analyzing about the basic principle of the linear and switch regulators, the basic system scheme and characteristic are presented. Next the paper makes a further and full study on operating principle and circuit design of the Boost DC-DC converter in the XD1174 controller, moreover,analysing the feedback control mode of the switch regulator. It can provide the fast load-transient response by using fixed-frequency peak current-mode control architecture and integrating built-in power MOSFET; and ensures the voltage loop operating stably through making use of easy compensation outside chip, which implements optimizer combination between low ripple and high efficiency and saves the cost for application. Adopting a LDO linear regulator to power most of the internal circuit, the interference from the supply noise is reduced. The IC provides soft-start function to limit inrush current during startup. A current-limit function for internal switches and output-fault shutdown protect the Boost regulator against fault conditions. At last, The sub-block and whole circuit is designed based on the 0.6μm BCD process. The simulation and verification is completed by the EDA tools such as Cadence etc. Accordingly to the simulation results, the function and partial performance of the whole circuit have met all the requirements.
Keywords/Search Tags:LCD, Switch Regulator, Stability, Peak Current Mode
PDF Full Text Request
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