Design Of Three Phase PLL And Research On Control Of DFIG Grid Convertor

With the development of power electronics, microelectronics and control theory, the power conversion apparatus based on the PWM (Pulse Width Modulation) technique is gaining wide application in conversion system of doubly-fed induction generator. PWM rectifiers have the characteristics of large power factor, bidirectional power flow and constant direct voltage. With the demand of PWM rectifier connetting to grid, the research of phase locked technique in three-phase grid voltage is becoming one of the research hotspots both at home and abroad. So a further research on PWM rectifier and its phase locked technique is deep real meaning.The thesis elaborates the basic work principle of the PWM rectifier according to the main circuit of three-phase VSR (Voltage Source PWM Rectifier) used in DFIG Mathematical models of three-phase VSR are established in three-phase static coordinate and two-phase rotate coordinate after analyzing the main circuit of three-phase VSR. Direct voltage,AC inductor and direct capacitor of the main circuit are designed. After analyzing many kinds of control methods and strategies, the control system is designed based on the mathematical model of three-phase VSR in two phase rotate coordinate. The models of the circuit and control system are established and simulations are done in SIMULINK. Simulation results verify the validity of the scheme, and the system achieves unity-power factor, bidirectional power flow and constant direct voltage of 250V.Three-phase PLL is researched about connetting grid and phase locked of PWM rectifier in the thesis.The thesis elaborates the basic work principle of the three-phase PLL and analyzes the PLL in distorted grid. Mathematical model of three-phase PLL is established and the PLL is analyzed with typical type I System. The system simulation is done in SIMULINK. The design is done based on FPGA. With An optimized scheme which reuses multiplication and uses CORDIC algorithm is proposed. A viable scheme of coordinated rotation digital computer (CORDIC) algorithm which can complete a all-around traverse is proposed.The optimized three phase-locked loop is implemented by Verilog HDL. The results of the simulation verify the viablity of the scheme of the PLL based on FPGA.