Design Of An 8-bit MCU Based On RISC Architecture

In this thesis, an 8-bit MCU based on RISC architecture is designed by Top-Down IC design method. Harvard bus and two level pipe-line structure are introduced. As a result, most of the instructions only need one machine cycle to be executed except those related to program branches, and the speed is increased. Since this type of MCU is based on RISC architecture, there are only 35 reduced instructions in its instruction set, which are easy to be learned and used. The performance of the 8-bit MCU is better than those of MCUs which are based on CISC architecture. It can be widely used in those controlling fields demanding low power consumption and high ratio of performance to price.The system specification, compartmentalization and design of sub modules, logic synthesis, placing and routing, functional simulation, etc. are described in detail in this thesis. The number of components is reduced as few as possible since the reduction of area and power consumption of the chip is taken into prior consideration in the design. At the same time, resource sharing is fulfilled and the control part is simplified. Especially, the research and optimization of ALU are emphasized. As a result, the resource is reduced greatly without modifying the functions.This project is financed by Tianjin Municipal Science and Technology Commission (TMSTC). The author is responsible for the system specification, compartmentalization and design of sub modules, logic synthesis and functional simulation. He also takes part in the work of placing and routing. Design tools of Cadence and Synopsys incorporations are used. The chips of this type of MCU have been successfully fabricated in Wuxi CSMC-HJ Semiconductor Co., Ltd in March, 2003 and the project has been successfully verified by TMSTC in November of the same year. This MCU adopts the instruction set of PIC16C62 and their functions are familiar. The achievement of this project would promote the development of ASICs and IC system integrations.