| Considered as the technology of the future microelectroincs, silicon-on-insulator (SOI) has been found great potential in integrated circuits with its unique structure, where lower consumption and high speed are required, as well as in radiation hardened :ircuits and high temperature devices. Focusing on these advanced studies in IC technology and based on the demands of the National Natural Science Foundation of China and the Shanghai Youth Foundation, we made a series of investigations mainly on 3 aspects: first, gettering of Cu impurities to nanocavities introduced by hydrogen and helium ion implantation in SOI and silicon materials; second, to fabricate thick BOX (buried oxide) SOI by Smart-cut technology for the application of high voltage SOI devices and microelectromechanical systems (MEMS); third, to explore the method of forming SOI materials by co-implantation of hydrogen and oxygen ions. Main results are drawn as follows:Gettering of metal impurities to nanccavities: The process and the condition for the formation of nanocavities induced by hydrogen or helium ions implantation has been studied, that is when annealed above 430, bubbles and nanocavities will be found in silicon with the medium dose hydrogen implantation. Furthermore, higher annealing temperature, low defects remained in silicon. Nanocavities was introduced in the substrates ofboth SIMOX and Smart-cut SOI wafers to study Cu impurities gettering. The results demonstrate that Cu impurities in the top Si layer can diffuse through the BOX layer of SIMOX and Smart-cut SOI a: temperature above 700癈 and be trapped by the nanocavities, which can getler not less than 80% of the Cu impurities in both wafers. Some of Cu impurities can be captured by the intrinsic defects at the BOX interface of SIMOX, but will be released out at high temperatures. The gettering effect of SIM OX intrinsic defects at BOX is much lower than that of the nanocavities. But no Cu are trapped at the rather perfect BOX interfaces of Smart-cut SOI. In addition, we produced both Al precipitates and nanocavities at different depths within one Si wafer to determine their relative gettering strength. It is found that Cu impurities are gettered primarily in the region containing the precipitated Al layer rather than by cavities at the temperature of 700-1000, While, gettering of Cu occurs in both region at temperature of 1200. In comparison with Al precipitates, whose concentration profile changed greatly with temperature and annealing time, cavities remain at approximately the same depth.Fabrication of thick BOX SOI materials: Thick BOX SOI materials, which are important in applications such as power devices, MEMS etc, have been successfully fabricated by the Smart-cut process. XTEM micrograph confirms the formation of the SOI structure. In addition, high resolution XTEM image have verified a good crystal quality of top Si and high quality silicon/insulator interfaces. And SRP results demonstrate excellent electrical property of our SOI material. The origin of the stress in Smart-cut SOI materials was analyzed. It is concluded that the residual stress in top silicon was enhanced with increasing BOX thickness. And this stress has certain effect on the electrical property of SOI layer. To decrease the stress, we may add the thickness of top silicon properly.Forming SOI materials by hydrogen and oxygen ions co-implantation:We systemically studied the new technology of forming BOX by co-implantation of hydrogen and oxygen ions. The experiment results demonstrate that the nanocavities and vacancies formed by hydrogen implantation and annealing act as highly efficient nucleation centers for oxygen precipitation, even at temperature much lower than 1300. And oxygen atoms captured by nanocavities, in turn, inhibited the growth of nanocavities. A complete SOI structure with a continuous BOX layer appears after the annealing. The spread and the depth of nanocavities and vacancies determines the relatively char... |
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