Study On Data Link Layer Technology In Security Switch

In the interconnected networks , because of the increasingly growing of users and hidden troubles of security . it is desiderated to be solved that data in networks would be switched and transfered safely. However , we cannot achieve high performance of security guarantee only by improving the software . In order to realize safe transfer of network data ultimately , we need to combine the hardware and the software to control the transfers of data in networks . The content of this article is studying the security switch protocols and data security policy in Ethernet environment as well as designing the security switch using these security methods .With studies on the principles of the data link layer in computer networks , this article brought forward a kind of security medium access protocol basing on Ethernet standards . It can ensure safe transfer of data in networks using hardware by way of specific methods that can form a frame and access channel as well as control the data flow in a security way . This article also did some research work in hardware data encryption . Then we put forward two ways to encrypt and transfer the data in high speed switch environment.For the sake of reliable transfer of data , we modeled and analyzed the characteristic of network data flow using queuing theory . Furthermore , we draw a conclusion that how much the size of the buffer would be appropriate and the time flow control must act. We also discussed the method of generating security CRC using linear feedback shift register .Based on the research of Ethernet security switch technology , we partitioned the security switch to several function modules , and implemented an Ethernet security switch prototype . Emphasizing on the interfaces between the data link layer and the upper switch part as well as and the lower PHY layer , we divide the data link layer part of Ethernet security switch into five modules as transmitting module , receiving module , transmitting buffer , receiving buffer and RMII manage module . Then we described and designed the transmitting buffer , receiving buffer and RMII buffer with hardware description language .