Study On Floorplan Algorithms In VLSI

Layout design or physical design is the most important and complex step of IC design. Due to the complexity of a layout design, it is often divided into a set of stages, such as partition, floorplanning, placement, routing and compaction etc. Besides, the floorplanning of VLSI is NP-complete problem and many heuristic algorithms have been developed to make near-optima. Presently, this problem has been studied widely and deeply, and many efficient algorithms are available.In this thesis, we focus on the stage of floorplanninng and placement. Firstly, we had discussed most representations for floorplan. Finally, we choose SP (Sequence Pair) as our main study foundation. In addition, this article also has done research on simulation annealing algorithm deeply, and proposed one floorplan algorithm based on SP. In order to obtain the better and steadier floorplan algorithm, we improved the move way of module based on existing weight model.Finally, we had done a lot of Experiments on the electric circuit's data of benchmark. The experiments indicated that our algorithm is effective and steady. In addition, cooperating with other group members mutually, we had made a simple electric circuit layout system which is composed of partitioning algorithm, floorplan algorithm and placement algorithm etc.