Study On Quality Improvement Of Silicon Wafers Annealed At High Temperature In Argon

With the development of the science and technology, Integrated Circuit(IC) is now bounding for larger diameter and higher integration level, therefore requires more high quality silicon wafers. The grown-in defects, which are not so detrimental in the previous time, but now have played a very harmful role on the device performance, for example, the Gate Oxide Integrity (GOI) of MOS device will be reduced by COP on the wafer surface, as a result the quality of the IC has been demolished. Several years before, researchers have found that high temperature annealing can eliminate the void-defects located in the near-surface region on the wafer, and they have developed a new product called "high wafer", improved the quality of silicon wafers to some degree. On the other hand, how to improve the Internal Getteting(IG) capacity across high temperature annealing to form oxygen precipitation in large diameter CZ silicon has become a important research point. In this paper, the effects of high temperature annealing on the eliminate of void-defects and improve the IG ability have been investigated.Argon was used as the annealing atmosphere in the thermal process. The out-diffusion of oxygen and the annihilation of voids in the silicon surface region was investigated at the first step of high temperature annealing. After this, a denuded zone of about 10μm can be obtained. Oxygen precipitation and related secondary defect were formed as gettering trap in the consequent low-high two step annealing. The role of different duration temperature and time on the elimination of voids and formation of oxygen precipitation were investigated in the thesis.The effects of high temperature annealing on the annihilation of void-defects in lightly-doped CZ wafers was investigated in the thesis. It was found that when the annealing temperature is above 1150℃the voids can be effectively eliminated and the density of the voids was dropped obviously with prolonged annealing time. However, high temperature annealing is not able to annihilate the void defects in the bulk region of the wafer, voids only in about 20μm depth profile from surface can be effectively annihilated. On the basis of the experiment, the voids annihilation mechanism was investigated.The effects of traditional there step high temperature annealing on the IG in CZ wafer was investigated. After first-step high temperature annealing and subsequence two-step (800℃/4h+1600℃/16h) annealing, the density and distribution of oxygen precipitation in the wafer and denuded zone (DZ) in the near-surface region was investigated. It was found that the first-step high temperature annealing can results in the out-diffusion of oxygen near the wafer surface.20μm DZ and high intensity oxygen precipitation can be obtained after annealing at above 1200℃for 2h. The effects of high temperature annealing on the GOI of MOS device is investigated after the first step annealing. The MOS device was prepared by polished wafers and annealed wafers respectively. It was found that the gate oxide integrity of the wafers can be well improved after annealing for 2h at 1200℃in argon ambient which is related to a significant reduction of near-surface crystal defects as compared to non-annealed polished wafers.