Simulation And Modeling Of Drift Drain MOSFET

High voltage Drift Drain MOSFETs (DDDMOS) are nowadays widely applied in circuits of power management, I/O interface, LCD drivers and etc. However, up to now a lack of a standard and accurate DDDMOS current model still brings much trouble in the circuit design. The models currently used are either modified from low voltage MOS models or based on macro model of simple polynomial established DDDMOS drift region resistance, both of which are limited and cannot provide a globally accurate physical model. Thus, these models cannot meet the different processing needs of different applications.Characteristics of DDDMOS were investigated using standard device and process simulating software in this work, and a physical device macro model was proposed. Basic principles of device modeling and simulation were introduced and by using process simulating software basic device structure were implemented, device characteristics were analyzed in succession. General modeling methods in industries and academies were analyzed and the physical characteristics of DDDMOS were studied in detail based on the simulation experiments. The macro model of drift region resistance was established based on the solution of Poisson's equations and continuity equations. By the combination of SPICE MOS (LEVEL=3) and the macro model, the complete DDDMOS model was then obtained, which accords well with simulated data. By simulating and comparing different devices of different process parameters, the model is applicable for different bias regions and can be useful in the power integrated circuit research in future.