| Since IC design entered nano-CMOS era, the drawbacks of global clock have become more and more severe in synchronous circuit, which drew asynchronous circuit back into research area. However, with its complex timing analysis, premature design methodology and lack of tool support, asynchronous design is still restricted from wide application.This paper, however, targets at the design of asynchronous micro- processor. By analysis the characters of asynchronous circuit and pipeline structures of modern processor, the principle of ASYNCHRONOUS MAPPING is proposed and proved. Basing on structure substitution, it can replace the clock(s) of synchronous pipeline with asynchronous control circuit, so as to build asynchronous design from its synchronous counterpart. Basing on this principle, a novel design flow for asynchronous pipeline is also proposed and analyzed, which can be fully compatible with current synchronous design flow and design tools, and can reduce the complexity of the asynchronous design considerably.The design flow is demonstrated by two pipeline examples; and its advantages are also presented on a super-scalar pipeline with IW structure.Furthermore, the layout design of asynchronous pipeline is also discussed, which targets at the additional work and potential problem to current synchronous layout design flow. |