Design And Optimization Of CMOS Image Sensor Control System

This thesis is one part of the project"Research on the key Technique of Deep Sub-micron High Dynamic, 10M Pixel Level CMOS Image Sensor", which is supported by National Natural Science Foundation of China. CMOS image sensor is characteristics of mature processing, strongly integration, random and high speed access, lower product cost, voltage and power. It has developed quickly and has become the key facility of image processing technology. It has been applied to a great many fields such as digital video camera, mobile communication, safeguard, automobile airbag and fingerprint identification. This project is academic creationary research. The study of control system will assist CMOS image sensor to have a wider market.The control system design and implement of image sensor are discussed in the thesis. Firstly, the structure of sensor array and functional modules is analyzed. Following Top-Down IC design method and the timing relationship of all controlling signals, the design is divided into several sub-modules. The enhanced functions such as IIC Bus, window selection, camera mode and frequency division are applied. The program is described in Verilog HDL. Simulation and debug of whole system is completed. In addition, the optimization of adaptive integration time and high dynamic range is designed and functional simulated in allusion to this control unit. The peripheral control circuit which is based on FPGA is charged with the transfer of control signals and pixel data. The EPP protocol is adopted for communication with PC. The interactive software is developed for image display, data storage and parameter adjustment with Window OS platform and Visual C++ IDE.