Implementation And Optimization Of H.264 Encoder On Blackfin (ADSP-BF537) Processor

Real-time video images communication needs efficient implementation and optimization about the video compression algorithms on power-efficient platforms. To meet such needs several compression methodologies and techniques have been proposed and standardized. This thesis presents the implementation details of H.264/AVC encoder on ADSP-BF537 processor based Analog Devices BF537-STAMP board, and gives several optimization techniques which have been concurrently employed in this work to improve the performance of the encoder.At the beginning of this thesis, it briefly introduces the video coding theory and the relevant international standards. Then the characteristic of H.264 standard and the new technology which adopted in H.264 are described in details.It also elaborates the features of the processor ADSP-BF537 and the platform which is used to run and test the encoder.This thesis focuses on the implementation and optimization of H.264 encoder.In the part of the implementation, firstly, it introduces features of the processor ADSP-BF537 and the platform which used to run and test the encoder, then, it elaborates the principle of the encoder, the characteristics of the Baseline profile encoder, the implementation processes and the module division, at last, it describes the process of porting the encoder and the running time ratio of different modules.In the part of the optimization, it mainly presents all kinds of strategies and techniques adopted in the optimization process and it describes the optimization methods in structure, code, and processor instruction etc, also it gives the test and analysis.Finally, it gives the result of the test, concludes the entire thesis and addresses the next stage of the work.