Research On The Architecture Of Coarse-grain Dataflow Network Processor

To meet the tremendous increasing of the network bandwidth, Network Processors (NPs) design should fully consider the matching with features of packet processing. The dataflow-based NP architecture can take advantage of flow-based characteristic of network applications.Aiming at the limitation of ILP exploitation and the fixed topology of control-flow NP, this dissertation proposes a new scheme of Coarse-grain Dataflow NP architecture (CDNP), by introducing the idea of coarse-grain dataflow design method. Several key techniques of CDNP are also investigated in-depth in this dissertation. As follows, the main work and contributions of the dissertation are:(1) Aiming at the problems of control-flow NP and the shortage in programmable ability of fine-grain synchronous dataflow NP architecture, a new scheme of CDNP architecture is proposed. Based on the data-flow model, CDNP not only improves the programmable ability of the entire NP by introducing the idea of control-flow structure into the design of Processing Element (PE), but also effectively exploits the task-level parallelism by making full use of the advantage of ILP exploitation in data-flow model. So it can get relatively high performance and flexibility in packet processing.(2) Aiming at the data-flow feature in packet processing of CDNP, the key techniques of PE design are researched. Firstly, implementation scheme of uCore ISA chosen and basic logic function are proposed. Secondly, mechanism of token processing in PE is researched, which demands the token processing module should implement the basic functions of token receiving, buffering, transition, encapsulation and sending, and match the characteristic of data-flow driven in token processing. Finally, aiming at management in frame buffer, the idea of hardware linklist is brought forward so as to provide good support in packet ordering of the same workload in the design of frame buffer.(3) Based on the mechanism of soft configuration for token processing path, a dynamic token processing path scheduling algorithm (DTPPS) is proposed. The algorithm monitors workload on each PE in CDNP. When the workloads among PEs become unbalanced, the algorithm prefers to adapt the token processing path of the workload and remap the task of heavy-loaded PE. The simulation shows that this algorithm can well balance the load of each PE and improve the overall throughput of CDNP effectively.Furthermore, the design of CDNP prototype system based on SoPC (System on Programmable Chip) is introduced. Four PEs and several functional modules are connected by communication network on the chip. The basic function of CDNP and some key techniques such as DTPPS can be analyzed and evaluated in depth in the prototype. The work in this dissertation can serve as an important guideline for the design of NPs.