MPEG-2 Video Transcoding Method In DCT Domain Based On Rate Control Using FPGA

Recently, due to the advances of network technologies and wide adoptions of video coding standards, networked multimedia services, such as video on demand, video streaming, and distance learning, become increasingly popular in our life. To flexibly deliver multimedia data to users with different available resources, access networks, and interests, the multimedia content may need to be adapted dynamically according to the usage context. Transcoding is one of the key technologies to fulfill this challenging task.Digital video transcoding is a real-time system with high performance, so that the general high-speed microprocessor couldn't achieve its requirement. To design a specific logic circuit and apply it to high-speed FPGA is the way to implement the function of ASIC in this paper because of its low cost, short design period, high reliability and good flexibility.Based on MPEG-2 variable length coding (VLC) theory, lookup tables are used to reduce storage space and complete VLC. To MPEG-2 Packet System, the thesis based on the definition of FPGA can be realized and a reduction in complexity by increasing space complete PES packetization module. According to the MPEG-2 Transcoding corresponding theory, the decoding module of the system is combinated and the actual bit of a flow of close to the board level simulation is used to simulate the module. According to the MPEG-2 TM5 rate control algorithm limitations, the thesis analyses P-frame only needs to be dealt with accordingly improve the video quality of the transformation scenes.According to performance estimation and simulation, all units come up to meet expectations of the design.