Research Of Steganlysis Based On FPGA

While the internet takes a revolution of our communication, the information security is becoming more and more important because of its opening and popularity. A new technology of information security—information hiding emerges as the time require in the face of the challenge of internet. Steganography is a very important part in information hiding, people pay more attention on it recently, and steganalysis is becoming hotspot of researchers.Based steganalysis of the basic theory, the whole process of steganalysis system is analysed completely in this paper, through description of two steganalysis algorithm, this system is researched from two aspects: no key steganalysis and with key steganalysis. EzStego is a non-key steganography algorithm, a method using smoothness is proposed in this paper, according correlation between adjacent pixels to detect the existence of secret message. The algorithm has better detection efficiency compared toχ~2 and RS detection methods, but due to a computational greater amount, the detection speed is slow, the image sources of the false report and miss are analysed. F5 algorithm has better security and it is testing complex, in this paper detecting F5 is completed by the length estimation of secret message, it does not contain confidential information when the length is below a certain small value, using this method not only the images can be detected, but also it can provide function for the key finding next. Statistical methods is used in this paper to implement the further attack to the images that have secret message, the correct key statistics has different distribution with a lot of wrong key stastistics, depend on this, a statistics is designed to reflect this differ, finally experiment proved that the idea is correct. Through the analysis of key attack computational complexity, the secret message length plays a very big role in the complexity, when it becomes longer, it is difficult to find the correct key using software, so a way using hardware is proposed. Using FPGA we can design flexible modules, each of them can achieve specifically function, the hardware attack can be carried out by all the modules. From simulation and experiment on the development board, the result is better than it by MATLAB, the hardware is faster and has better efficiency.