Face Detection Design And Verify On SystemC Platform

Face Detection Algorithm plays a very important role in research of computer visions. It has been also widely used in the fields of individual identification; safely monitor, picture media searches, etc. Now the Face Detection systems on PC platform always have some defects like non-real-time and delay. So it seems necessary to increase the detection speed through Embed system or Hardware/Software co-design. With the development of Moore Law, the improvement of manufactory technique and the more complexity of electro circuit functions, the integrity level, power and speed have been hugely increased. That results more and more complexity for SoC design.This Paper will analyze the algorithm of face detection, to design a complete face detection solution based on Soc system. In the process of software realization and platform migration, the paper will analyze the bottleneck of the face detection algorithm. Using the SW/HW co-design pattern based on ESL platform, it will divide the SW/HW parts effectively. Taking advantage of the merit of SystemC language modeling, we can design the hardware accelerator partition on MaxSim simulation platform effectively. Then we run SW/HW co-verification after integrating the hardware partitions into the whole ESL platform. With the simulation and performance test, it can be verified that the face detection algorithm can run more fast and perform munch better after hardware optimization. Also it can approve the validity of SW/HW co-design on SystemC simulation platform. Works in this paper has some value for the research of design and verification of face detection on SoC.