| The thesis analyses the physical design and optimization of interconnection in X stream processor cluster mainly. Optimization of interconnection wire-delay and placement&routing, and interconnection distribution models are researched in detail. The main work can be summarized as follows:Firstly, many interconnection optimization methods are studied broadly, such as using better material, adopting hierarchy model, innovative three-dimensional IC and so on. Besides, the thesis analyses many circuit implementations to optimize long-wire delay, and implements a hybrid insertion strategy based on full-swing repeaters and low-swing transceivers. The result verifies its effectiveness.Secondly, based on the half-custom design flow, the placement&routing of X stream processor cluster is optimized by floorplanning and routing. Chip size and macro-block's position are taken into consideration in Floorplanning. The macro-block's relative position is determined on the logic structures and data stream information among functional units. Besides, due to the placement of macro-block's significant impact on interconnection, we gather macro-blocks around the chip boundary, avoiding the long-wire across macro-blocks. Furthermore, three typical interconnection distributing models are researched, and compared with the interconnection distributing in the X stream processor. Then the interconnection in the X stream processor is improved aiming at the existing problems, with optimization of floorplan, the overall performance is promoted. Meanwhile, it provides full-custom functional units with reference information, such as shape,size,terminal position, etc.Finally, based on the optimized interconnection distributing, typical interconnection distributing models are modified to get close to the perfect model suited for the optimized result, so as to guide the subsequent optimization. Based on the modified model, its applications are analyzed qualitatively. |