| With the rapid development of micro-electronic manufacture craft and advanceddesign technology, digital circuits, memories, analog and mixed-signal core systemscan be integrated on a single chip, namely system-on-a-chip (SOC). This promotesmixed-signal systems'development. At the same time, it proposes more demands forthe speed of the test equipment and performance. We urgently need new theories andnew methods to solve this problem.BIST(Built-In Self-Test) is considered to be one of the e?ective methods to resolveanalog and mixed-signal test. It is based on the idea that the circuit can generate testvectors itself, and does not require external test vector, and decides whether the circuitis correct or not depending on corresponding self-logic. It not only overcomes that theexternal automatic test equipment (ATE) can not detect real-time faults at the lowspeed, but also provides more convenient and e?ective options. Therefore, BIST hasattracted many people's attention in recent years, and has become a hot research topic.This paper roots in Natural Science Fund of Guangxi province– The Study ofPseudo-random Testing of MSCBIST in the SOC. This paper studies pseudo-randomtesting. First, we obtain pseudorandom test sequences generated by linear feedbackshift register (LFSR) as test incentive. MAC and the comparator work as a responseanalyzer. Then ,we construct mixed-signal BIST structure . The signatures are ob-tained by calculating the cross-correlation between the input sequences and outputresponses,and construct signature space. By mapping the tolerance ranges, we canestimate whether the CUT is right or not in the signature space according to thetolerance range and finish simulation under the Pspice environment.The simulation results show that the mixed-signal BIST structure is viable andreaches the predetermined research objective . Also, it can be applied to the mixed-signal circuits test. It has positive significance to mixed-signal circuits test. |