Research Of Fast Lock-in RF PLL Frequency Synthesizers

As a key component in communication system,The PLL frequency synthesizer plays an important role in modern communication and information processed system. The PLL frequency synthesizer,as a local oscillator in wireless transmitter and receiver,its performance has decisive function in the whole system performance. Currently,along with the exaltation of the data transmitted speed,the lock-in time of the local oscillator frequency synthesizer becomes a key specification in the radio frequency transmitter and receiver.The lock-in speed of the frequency synthesizer determines how fast the communication channels can be switched and how fast the system can work.Especially in military Frequency Hopping communication,building an ultra-wide band,fast lock-in,low phase noise,low spurs and fully integrated synthesizers is an ever-lasting challenge in modern wireless communication systems.This paper describes the operating theory of PLL synthesizer,phase noise and spurs, as well as its dynamic lock-in process,reviewing the methods that speed-up the lock-in process of synthesizers.A "5.1～7.4GHz frequency synthesizer" which was developed recently,uses a high-speed MCU,a temperature sensor,ADC,DAC.It intelligently complete controlling,studying and testing for voltage-controlled oscillator(VCO) that characterizes wideband,high voltage-controlled sensitivity,high temperature-drifting rate.It directly eliminates initiative frequency error by presetting the voltage of VCO.It can effectively shorten the Lock-in time of PLL Frequency Synthesizers;greatly speed up lock-in process.The research avoided the tradeoff between the lock-in speed and the phase noise,spurs.It insures that the synthesizer can steadily work,realizes the capturing,locking-in and dynamic adjusting for wideband frequency synthesizers.This paper is very practical for the research of Fast Lock-in mode in ultra-wideband frequency synthesizer.