Scan Test And Build-In Self Test On MCU IC

Integrated Circuit technology has been developed rapidly in recent years, where IC testing has become the most significant step as far as time, engineering resources and expenditure are concerned. Traditional test focuses on functional modules. During design phase, not much attention paid to facilitating testing.With more complexity the integrated circuit grows into, testing technology has been facing more and more challenges, especially when it enters into the ultra-integration era, the IC manufacturers make the IC more and more powerful, integrating more and more IP cores. Meanwhile, the competition between manufacturers becomes even more furious, the prices reduction and shorter cycle time requirement from the market is becoming more obvious. All these lead to more and more new chanllenges for the testing technology.New testing methodolology has been developed, that is Design For Test, which means the designer needs to take it into consideration to facilitating testing of the chips when he designs the chips. This paper is going to discuss the DFT technology as well as testing methodology based on DFT.The manufacturing of the IC chips includes the following phases: wafer fabrication, probe test, assembly, burn-in and final test before it reaches the end customers. In this paper the focus is on the final test.This paper is going to describe the details of the DFT implementation in final test on Freescale S08 R family MCU products. Due to the proprietory consideration, the writer will use the clock diagrams to describe the softwares flows. The test software is based on Teradyne J750 testing platform. Test program has passed the standard quality review and the program debugging successfully. Furthermore, it has been implemented into production for a period of time. Millions of IC parts have been shipped to end customers. We have got positive feedback from the cortomers. All these above described proved that the implementation of DFT in this product is successful.